[Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs

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* [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set
@ 2011-04-04 22:27 danglin at gcc dot gnu.org
  2011-04-04 22:31 ` [Bug middle-end/48441] " dave at hiauly1 dot hia.nrc.ca
                   ` (9 more replies)
  0 siblings, 10 replies; 11+ messages in thread
From: danglin at gcc dot gnu.org @ 2011-04-04 22:27 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

           Summary: [4.7 Regression] ICE in mark_oprs_set
           Product: gcc
           Version: 4.7.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: danglin@gcc.gnu.org
              Host: hppa*-*-*
            Target: hppa*-*-*
             Build: hppa*-*-*


/home/dave/gnu/gcc/objdir/./prev-gcc/xgcc
-B/home/dave/gnu/gcc/objdir/./prev-gcc/
-B/home/dave/opt/gnu/gcc/gcc-4.7.0/hppa-linux/bin/
-B/home/dave/opt/gnu/gcc/gcc-4.7.0/hppa-linux/bin/
-B/home/dave/opt/gnu/gcc/gcc-4.7.0/hppa-linux/lib/ -isystem
/home/dave/opt/gnu/gcc/gcc-4.7.0/hppa-linux/include -isystem
/home/dave/opt/gnu/gcc/gcc-4.7.0/hppa-linux/sys-include     -I../../gcc/libcpp
-I. -I../../gcc/libcpp/../include -I../../gcc/libcpp/include  -g -O2 -W -Wall
-Wwrite-strings -Wmissing-format-attribute -Wstrict-prototypes
-Wmissing-prototypes -Wold-style-definition -Wc++-compat -pedantic
-Wno-long-long -Werror -I../../gcc/libcpp -I. -I../../gcc/libcpp/../include
-I../../gcc/libcpp/include  -c -o charset.o -MT char
set.o -MMD -MP -MF .deps/charset.Tpo ../../gcc/libcpp/charset.c

../../gcc/libcpp/charset.c: In function 'convert_utf16_utf8':
../../gcc/libcpp/charset.c:524:1: internal compiler error: Segmentation fault

Program received signal SIGSEGV, Segmentation fault.
0x0343fb28 in mark_oprs_set (insn=0x407a5c30) at ../../gcc/gcc/cprop.c:543
543      for (def_rec = DF_INSN_INFO_DEFS (insn_info); *def_rec; def_rec++)
(gdb) bt
#0  0x0343fb28 in mark_oprs_set (insn=0x407a5c30) at ../../gcc/gcc/cprop.c:543
#1  0x03443024 in one_cprop_pass () at ../../gcc/gcc/cprop.c:1802
#2  0x03443320 in execute_rtl_cprop () at ../../gcc/gcc/cprop.c:1853
#3  0x013714f0 in execute_one_pass (pass=0x42e7820)
    at ../../gcc/gcc/passes.c:1555
#4  0x01371870 in execute_pass_list (pass=0x42e7820)
    at ../../gcc/gcc/passes.c:1610
#5  0x01371898 in execute_pass_list (pass=0x42e7820)
    at ../../gcc/gcc/passes.c:1611
#6  0x01371898 in execute_pass_list (pass=0x42e7820)
    at ../../gcc/gcc/passes.c:1611
Backtrace stopped: previous frame identical to this frame (corrupt stack?)

dave@hiauly6:~/gnu/gcc/objdir/prev-gcc$ ./xgcc -B./ -v
Reading specs from ./specs
COLLECT_GCC=./xgcc
COLLECT_LTO_WRAPPER=./lto-wrapper
Target: hppa-linux
Configured with: ../gcc/configure --with-gnu-as --with-gnu-ld --enable-shared
--prefix=/home/dave/opt/gnu/gcc/gcc-4.7.0
--with-local-prefix=/home/dave/opt/gnu --enable-threads=posix
--enable-__cxa_atexit --build=hppa-linux --enable-clocale=gnu
--enable-java-gc=boehm --enable-java-awt=xlib --without-cloog --without-ppl
--enable-languages=c,c++,objc,fortran,obj-c++,java,ada
Thread model: posix
gcc version 4.7.0 20110404 (experimental) [trunk revision 171950] (GCC)


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
@ 2011-04-04 22:31 ` dave at hiauly1 dot hia.nrc.ca
  2011-04-04 22:37 ` danglin at gcc dot gnu.org
                   ` (8 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: dave at hiauly1 dot hia.nrc.ca @ 2011-04-04 22:31 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

--- Comment #1 from dave at hiauly1 dot hia.nrc.ca 2011-04-04 22:30:50 UTC ---
On Mon, 04 Apr 2011, danglin at gcc dot gnu.org wrote:

Attached .i.

Dave


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
  2011-04-04 22:31 ` [Bug middle-end/48441] " dave at hiauly1 dot hia.nrc.ca
@ 2011-04-04 22:37 ` danglin at gcc dot gnu.org
  2011-04-04 22:46 ` steven at gcc dot gnu.org
                   ` (7 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: danglin at gcc dot gnu.org @ 2011-04-04 22:37 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

--- Comment #2 from John David Anglin <danglin at gcc dot gnu.org> 2011-04-04 22:37:38 UTC ---
(gdb) p debug_rtx (insn)
(jump_insn/v 247 246 338 29 (set (pc)
        (if_then_else (eq (reg/v:SI 116 [ rval ])
                (const_int 7 [0x7]))
            (label_ref:SI 338)
            (pc))) ../../gcc/libcpp/charset.c:481 25 {*pa.md:1330}
     (expr_list:REG_BR_PROB (const_int 9550 [0x254e])
        (nil))
 -> 338)
$1 = void
(gdb) p/x $pc
$2 = 0x343fb28
(gdb) disass 0x343fb18,0x343fb38
Dump of assembler code from 0x343fb18 to 0x343fb38:
   0x0343fb18 <mark_oprs_set+48>:    add,l r19,ret0,ret0
   0x0343fb1c <mark_oprs_set+52>:    ldw 0(ret0),ret0
   0x0343fb20 <mark_oprs_set+56>:    stw ret0,c(r3)
   0x0343fb24 <mark_oprs_set+60>:    ldw c(r3),ret0
=> 0x0343fb28 <mark_oprs_set+64>:    ldw 4(ret0),ret0
   0x0343fb2c <mark_oprs_set+68>:    stw ret0,8(r3)
   0x0343fb30 <mark_oprs_set+72>:    b,l,n 0x343fb68 <mark_oprs_set+128>,r0
   0x0343fb34 <mark_oprs_set+76>:    addil L%8f800,dp,r1
End of assembler dump.
(gdb) p/x $ret0
$3 = 0x0


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
  2011-04-04 22:31 ` [Bug middle-end/48441] " dave at hiauly1 dot hia.nrc.ca
  2011-04-04 22:37 ` danglin at gcc dot gnu.org
@ 2011-04-04 22:46 ` steven at gcc dot gnu.org
  2011-04-04 22:50 ` steven at gcc dot gnu.org
                   ` (6 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: steven at gcc dot gnu.org @ 2011-04-04 22:46 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

Steven Bosscher <steven at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2011.04.04 22:46:09
         AssignedTo|unassigned at gcc dot       |steven at gcc dot gnu.org
                   |gnu.org                     |
     Ever Confirmed|0                           |1

--- Comment #3 from Steven Bosscher <steven at gcc dot gnu.org> 2011-04-04 22:46:09 UTC ---
Obviously mine.


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
                   ` (2 preceding siblings ...)
  2011-04-04 22:46 ` steven at gcc dot gnu.org
@ 2011-04-04 22:50 ` steven at gcc dot gnu.org
  2011-04-05  1:12 ` danglin at gcc dot gnu.org
                   ` (5 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: steven at gcc dot gnu.org @ 2011-04-04 22:50 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

--- Comment #4 from Steven Bosscher <steven at gcc dot gnu.org> 2011-04-04 22:50:01 UTC ---
I'll try to reproduce this with a cross-compiler tomorrow. It would be helpful
if you can dump the DF info for this insn (df_debug_insn).


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
                   ` (3 preceding siblings ...)
  2011-04-04 22:50 ` steven at gcc dot gnu.org
@ 2011-04-05  1:12 ` danglin at gcc dot gnu.org
  2011-04-05  5:54 ` steven at gcc dot gnu.org
                   ` (4 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: danglin at gcc dot gnu.org @ 2011-04-05  1:12 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

--- Comment #5 from John David Anglin <danglin at gcc dot gnu.org> 2011-04-05 01:12:21 UTC ---
Is this what you want?

(gdb) p df_dump (stderr)


convert_utf16_utf8

Dataflow summary:
;;  invalidated by call      0 [%r0] 1 [%r1] 2 [%r2] 19 [%r19] 20 [%r20] 21
[%r21] 22 [%r22] 23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 27 [%r27] 28 [%r28] 29
[%r29] 31 [%r31] 32 [%fr4] 33 [%fr4R] 34 [%fr5] 35 [%fr5R] 36 [%fr6] 37 [%fr6R]
38 [%fr7] 39 [%fr7R] 40 [%fr8] 41 [%fr8R] 42 [%fr9] 43 [%fr9R] 44 [%fr10] 45
[%fr10R] 46 [%fr11] 47 [%fr11R] 68 [%fr22] 69 [%fr22R] 70 [%fr23] 71 [%fr23R]
72 [%fr24] 73 [%fr24R] 74 [%fr25] 75 [%fr25R] 76 [%fr26] 77 [%fr26R] 78 [%fr27]
79 [%fr27R] 80 [%fr28] 81 [%fr28R] 82 [%fr29] 83 [%fr29R] 84 [%fr30] 85
[%fr30R] 86 [%fr31] 87 [%fr31R] 88 [SAR]
;;  hardware regs used      30 [%r30] 89 [sfp]
;;  regular block artificial uses      3 [%r3] 30 [%r30] 89 [sfp]
;;  eh block artificial uses      3 [%r3] 30 [%r30] 89 [sfp]
;;  entry block defs      2 [%r2] 3 [%r3] 23 [%r23] 24 [%r24] 25 [%r25] 26
[%r26] 28 [%r28] 30 [%r30] 32 [%fr4] 33 [%fr4R] 34 [%fr5] 35 [%fr5R] 36 [%fr6]
37 [%fr6R] 38 [%fr7] 39 [%fr7R] 89 [sfp]
;;  exit block uses      3 [%r3] 28 [%r28] 30 [%r30] 89 [sfp]
;;  regs ever live      1[%r1] 2[%r2] 23[%r23] 24[%r24] 25[%r25] 26[%r26]
28[%r28] 30[%r30]
;;  ref usage     r0={2d} r1={2d} r2={3d} r3={1d,39u,4e} r19={2d} r20={2d}
r21={2d} r22={2d} r23={3d,1u} r24={3d,1u} r25={4d,2u} r26={4d,2u} r27={2d}
r28={4d,4u} r29={2d} r30={1d,41u} r31={2d} r32={3d} r33={3d} r34={3d} r35={3d}
r36={3d} r37={3d} r38={3d} r39={3d} r40={2d} r41={2d} r42={2d} r43={2d}
r44={2d} r45={2d} r46={2d} r47={2d} r68={2d} r69={2d} r70={2d} r71={2d}
r72={2d} r73={2d} r74={2d} r75={2d} r76={2d} r77={2d} r78={2d} r79={2d}
r80={2d} r81={2d} r82={2d} r83={2d} r84={2d} r85={2d} r86={2d} r87={2d}
r88={2d} r89={1d,47u} r96={3d,10u} r98={1d,2u} r102={1d,2u} r104={2d,3u}
r106={1d,1u} r109={1d,2u} r111={1d,2u} r115={2d,1u} r116={4d,1u}
r127={2d,13u,3e} r130={2d,1u} r134={1d,3u} r137={1d,1u} r139={3d,10u}
r140={2d,4u} r145={2d,5u} r146={1d,2u} r150={2d,7u,1e} r151={2d,6u,1e}
r155={2d,7u} r186={2d,3u} r201={1d,1u} r203={1d,5u} r204={3d,15u} r205={3d,12u}
r206={1d,11u} r207={1d,1u} r208={1d,1u} r209={1d,1u} r210={1d,1u} r212={1d,1u}
r213={1d,1u} r214={1d,1u} r215={1d,1u} r216={1d,1u} r217={1d,1u}
r218={1d,1u,1e} r219={1d,1u} r220={1d,1u} r221={1d,2u} r222={1d,1u,1e}
r223={1d,1u} r225={1d,1u} r226={1d,1u} r227={1d,1u,1e} r228={1d,1u}
r229={1d,1u} r230={1d,1u} r231={1d,1u} r232={1d,1u} r233={1d,1u} r234={1d,1u}
r236={1d,1u} r238={1d,1u} r239={1d,1u} r242={1d,1u} r243={1d,1u} r244={1d,1u}
r245={1d,1u} r246={1d,1u} r247={1d,1u} r248={1d,1u} r250={1d,1u} r251={1d,1u}
r252={1d,2u} r254={1d,1u} r255={1d,1u} r257={1d,1u} r258={1d,1u} r259={1d,1u}
r260={1d,1u} r261={1d,1u} r262={1d,1u} r263={1d,1u} r264={1d,1u} r265={1d,1u}
r267={1d,1u} r268={1d,1u} r269={1d,1u} r270={1d,1u} r271={1d,1u} r273={1d,1u} 
;;    total ref usage 564{227d,325u,12e} in 206{204 regular + 2 call} insns.

( )->[0]->( 2 )
;; bb 0 artificial_defs: { d-1(2){ }d-1(3){ }d-1(23){ }d-1(24){ }d-1(25){
}d-1(26){ }d-1(28){ }d-1(30){ }d-1(32){ }d-1(33){ }d-1(34){ }d-1(35){ }d-1(36){
}d-1(37){ }d-1(38){ }d-1(39){ }d-1(89){ }}
;; bb 0 artificial_uses: { }
;; lr  in      
;; lr  use     
;; lr  def      2 [%r2] 3 [%r3] 23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 28
[%r28] 30 [%r30] 32 [%fr4] 33 [%fr4R] 34 [%fr5] 35 [%fr5R] 36 [%fr6] 37 [%fr6R]
38 [%fr7] 39 [%fr7R] 89 [sfp]
;; live  in      
;; live  gen      2 [%r2] 3 [%r3] 23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 28
[%r28] 30 [%r30] 32 [%fr4] 33 [%fr4R] 34 [%fr5] 35 [%fr5R] 36 [%fr6] 37 [%fr6R]
38 [%fr7] 39 [%fr7R] 89 [sfp]
;; live  kill    
;; lr  out      3 [%r3] 23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 30 [%r30] 89
[sfp]
;; live  out      3 [%r3] 23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 30 [%r30] 89
[sfp]

( 0 )->[2]->( 3 )
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u0(3){ }u1(30){ }u2(89){ }}
;; lr  in       3 [%r3] 23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 30 [%r30] 89
[sfp]
;; lr  use      3 [%r3] 23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 30 [%r30] 89
[sfp]
;; lr  def      96 98 139 203 204 205 206 207 208
;; live  in       3 [%r3] 23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 30 [%r30] 89
[sfp]
;; live  gen      96 98 139 203 204 205 206 207 208
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206

( 31 2 25 )->[3]->( 27 4 )
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u29(3){ }u30(30){ }u31(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 205
;; lr  def     
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  gen     
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206

( 3 )->[4]->( 35 5 )
;; bb 4 artificial_defs: { }
;; bb 4 artificial_uses: { u39(3){ }u40(30){ }u41(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 203 204
;; lr  def      102 127 209 210 212 213 214 215 216 217 218 219 220 221
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  gen      102 127 209 210 212 213 214 215 216 217 218 219 220 221
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206 221
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206 221

( 4 )->[5]->( 6 10 )
;; bb 5 artificial_defs: { }
;; bb 5 artificial_uses: { u63(3){ }u64(30){ }u65(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206 221
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 127 221
;; lr  def      222 223
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206 221
;; live  gen      222 223
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206

( 5 )->[6]->( 36 7 )
;; bb 6 artificial_defs: { }
;; bb 6 artificial_uses: { u71(3){ }u72(30){ }u73(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 205
;; lr  def     
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206
;; live  gen     
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206

( 6 )->[7]->( 33 34 )
;; bb 7 artificial_defs: { }
;; bb 7 artificial_uses: { u76(3){ }u77(30){ }u78(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 102
;; lr  def     
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 102 127 139 203 204 205 206
;; live  gen     
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206

( 33 34 )->[8]->( 37 9 )
;; bb 8 artificial_defs: { }
;; bb 8 artificial_uses: { u80(3){ }u81(30){ }u82(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 130 139 186 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 130 186 204
;; lr  def      134 225 226 227 228 229 230
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 130 139 186 203 204 205 206
;; live  gen      134 225 226 227 228 229 230
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 134 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 134 139 203 204 205 206

( 8 )->[9]->( 11 )
;; bb 9 artificial_defs: { }
;; bb 9 artificial_uses: { u94(3){ }u95(30){ }u96(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 134 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 127 134
;; lr  def      127 137 231 232 233
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 134 139 203 204 205 206
;; live  gen      127 137 231 232 233
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206

( 5 )->[10]->( 12 11 )
;; bb 10 artificial_defs: { }
;; bb 10 artificial_uses: { u107(3){ }u108(30){ }u109(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 127
;; lr  def      234
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; live  gen      234
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206

( 10 9 )->[11]->( 14 )
;; bb 11 artificial_defs: { }
;; bb 11 artificial_uses: { u116(3){ }u117(30){ }u118(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 127
;; lr  def      104 145 150 271 273
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; live  gen      104 145 150 271 273
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 150 203 204 205
206 271
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 150 203 204 205
206 271

( 10 )->[12]->( 17 )
;; bb 12 artificial_defs: { }
;; bb 12 artificial_uses: { u121(3){ }u122(30){ }u123(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 127
;; lr  def      151 155
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; live  gen      151 155
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206

( 15 14 )->[13]->( 14 )
;; bb 13 artificial_defs: { }
;; bb 13 artificial_uses: { u128(3){ }u129(30){ }u130(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 146 150 151 203 204 205
206 271
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 146 151
;; lr  def      104 145
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 146 150 151 203 204 205
206 271
;; live  gen      104 145
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 150 203 204 205
206 271
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 150 203 204 205
206 271

( 13 11 )->[14]->( 13 15 )
;; bb 14 artificial_defs: { }
;; bb 14 artificial_uses: { u133(3){ }u134(30){ }u135(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 150 203 204 205
206 271
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 104 145 150
;; lr  def      146 150 151 236 238 239
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 150 203 204 205
206 271
;; live  gen      146 150 151 236 238 239
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 146 150 151 203
204 205 206 271
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 146 150 151 203
204 205 206 271

( 14 )->[15]->( 13 16 )
;; bb 15 artificial_defs: { }
;; bb 15 artificial_uses: { u153(3){ }u154(30){ }u155(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 146 150 151 203
204 205 206 271
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 150 151 271
;; lr  def      242 243 244 245
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 146 150 151 203
204 205 206 271
;; live  gen      242 243 244 245
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 146 150 151 203
204 205 206 271
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 146 150 151 203
204 205 206 271

( 15 )->[16]->( 17 )
;; bb 16 artificial_defs: { }
;; bb 16 artificial_uses: { u164(3){ }u165(30){ }u166(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 150 151 203 204
205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 104 145 150
;; lr  def      155 246 247 248 250 251
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 104 127 139 145 150 151 203 204
205 206
;; live  gen      155 246 247 248 250 251
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206

( 12 16 )->[17]->( 31 18 )
;; bb 17 artificial_defs: { }
;; bb 17 artificial_uses: { u178(3){ }u179(30){ }u180(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 96 151
;; lr  def     
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
;; live  gen     
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206

( 17 )->[18]->( 19 22 )
;; bb 18 artificial_defs: { }
;; bb 18 artificial_uses: { u185(3){ }u186(30){ }u187(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 155
;; lr  def      252
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
;; live  gen      252
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
252
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
252

( 18 )->[19]->( 20 )
;; bb 19 artificial_defs: { }
;; bb 19 artificial_uses: { u193(3){ }u194(30){ }u195(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
252
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 155 252
;; lr  def      140 201
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
252
;; live  gen      140 201
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 140 151 155 201 203 204
205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 140 151 155 201 203 204
205 206

( 20 19 )->[20]->( 20 21 )
;; bb 20 artificial_defs: { }
;; bb 20 artificial_uses: { u200(3){ }u201(30){ }u202(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 140 151 155 201 203 204
205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 139 140 155 201
;; lr  def      140 254 255
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 140 151 155 201 203 204
205 206
;; live  gen      140 254 255
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 140 151 155 201 203 204
205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 140 151 155 201 203 204
205 206

( 20 )->[21]->( 22 )
;; bb 21 artificial_defs: { }
;; bb 21 artificial_uses: { u212(3){ }u213(30){ }u214(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 139 155
;; lr  def      139 257 258 259
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 155 203 204 205 206
;; live  gen      139 257 258 259
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 203 204 205 206

( 21 18 )->[22]->( 23 24 )
;; bb 22 artificial_defs: { }
;; bb 22 artificial_uses: { u222(3){ }u223(30){ }u224(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 96 127 151
;; lr  def      96 260
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 151 203 204 205 206
;; live  gen      96 260
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206

( 22 )->[23]->( 25 )
;; bb 23 artificial_defs: { }
;; bb 23 artificial_uses: { u231(3){ }u232(30){ }u233(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 204 205
;; lr  def      204 205
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  gen      204 205
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206

( 22 )->[24]->( 25 )
;; bb 24 artificial_defs: { }
;; bb 24 artificial_uses: { u238(3){ }u239(30){ }u240(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 204 205
;; lr  def      204 205
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  gen      204 205
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206

( 24 23 )->[25]->( 3 26 )
;; bb 25 artificial_defs: { }
;; bb 25 artificial_uses: { u245(3){ }u246(30){ }u247(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 205
;; lr  def     
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  gen     
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206

( 25 )->[26]->( 28 )
;; bb 26 artificial_defs: { }
;; bb 26 artificial_uses: { u253(3){ }u254(30){ }u255(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp]
;; lr  def     
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; live  gen     
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 206

( 3 )->[27]->( 38 29 )
;; bb 27 artificial_defs: { }
;; bb 27 artificial_uses: { u256(3){ }u257(30){ }u258(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 205
;; lr  def      116
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 203 204 205 206
;; live  gen      116
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 116 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 116 203 204 205 206

( 27 )->[38]->( 28 )
;; bb 38 artificial_defs: { }
;; bb 38 artificial_uses: { u-1(3){ }u-1(30){ }u-1(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp]
;; lr  def     
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; live  gen     
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 206

( 38 26 )->[28]->( 32 )
;; bb 28 artificial_defs: { }
;; bb 28 artificial_uses: { u263(3){ }u264(30){ }u265(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; lr  def      115 261 262
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; live  gen      115 261 262
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 115
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 115

( 27 )->[29]->( 30 )
;; bb 29 artificial_defs: { }
;; bb 29 artificial_uses: { u271(3){ }u272(30){ }u273(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 116 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 116
;; lr  def     
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 116 203 204 205 206
;; live  gen     
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 116 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 116 203 204 205 206

( )->[39]->( 31 )
;; bb 39 artificial_defs: { }
;; bb 39 artificial_uses: { u-1(3){ }u-1(30){ }u-1(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp]
;; lr  def     
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 203 204 205 206
;; live  gen     
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 203 204 205 206

( 37 29 35 36 )->[30]->( 32 )
;; bb 30 artificial_defs: { }
;; bb 30 artificial_uses: { u275(3){ }u276(30){ }u277(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 116
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 116
;; lr  def      0 [%r0] 1 [%r1] 2 [%r2] 19 [%r19] 20 [%r20] 21 [%r21] 22 [%r22]
23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 27 [%r27] 28 [%r28] 29 [%r29] 31 [%r31]
32 [%fr4] 33 [%fr4R] 34 [%fr5] 35 [%fr5R] 36 [%fr6] 37 [%fr6R] 38 [%fr7] 39
[%fr7R] 40 [%fr8] 41 [%fr8R] 42 [%fr9] 43 [%fr9R] 44 [%fr10] 45 [%fr10R] 46
[%fr11] 47 [%fr11R] 68 [%fr22] 69 [%fr22R] 70 [%fr23] 71 [%fr23R] 72 [%fr24] 73
[%fr24R] 74 [%fr25] 75 [%fr25R] 76 [%fr26] 77 [%fr26R] 78 [%fr27] 79 [%fr27R]
80 [%fr28] 81 [%fr28R] 82 [%fr29] 83 [%fr29R] 84 [%fr30] 85 [%fr30R] 86 [%fr31]
87 [%fr31R] 88 [SAR] 106 115
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 116
;; live  gen      28 [%r28] 106 115
;; live  kill     1 [%r1] 2 [%r2]
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 115
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 115

( 39 17 )->[31]->( 3 )
;; bb 31 artificial_defs: { }
;; bb 31 artificial_uses: { u282(3){ }u283(30){ }u284(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 96 206
;; lr  def      0 [%r0] 1 [%r1] 2 [%r2] 19 [%r19] 20 [%r20] 21 [%r21] 22 [%r22]
23 [%r23] 24 [%r24] 25 [%r25] 26 [%r26] 27 [%r27] 28 [%r28] 29 [%r29] 31 [%r31]
32 [%fr4] 33 [%fr4R] 34 [%fr5] 35 [%fr5R] 36 [%fr6] 37 [%fr6R] 38 [%fr7] 39
[%fr7R] 40 [%fr8] 41 [%fr8R] 42 [%fr9] 43 [%fr9R] 44 [%fr10] 45 [%fr10R] 46
[%fr11] 47 [%fr11R] 68 [%fr22] 69 [%fr22R] 70 [%fr23] 71 [%fr23R] 72 [%fr24] 73
[%fr24R] 74 [%fr25] 75 [%fr25R] 76 [%fr26] 77 [%fr26R] 78 [%fr27] 79 [%fr27R]
80 [%fr28] 81 [%fr28R] 82 [%fr29] 83 [%fr29R] 84 [%fr30] 85 [%fr30R] 86 [%fr31]
87 [%fr31R] 88 [SAR] 96 109 111 139 263 264 265
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 203 204 205 206
;; live  gen      25 [%r25] 26 [%r26] 28 [%r28] 96 109 111 139 263 264 265
;; live  kill     1 [%r1] 2 [%r2]
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 139 203 204 205 206

( 28 30 )->[32]->( 1 )
;; bb 32 artificial_defs: { }
;; bb 32 artificial_uses: { u305(3){ }u306(30){ }u307(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 115
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 115
;; lr  def      28 [%r28]
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 115
;; live  gen      28 [%r28]
;; live  kill    
;; lr  out      3 [%r3] 28 [%r28] 30 [%r30] 89 [sfp]
;; live  out      3 [%r3] 28 [%r28] 30 [%r30] 89 [sfp]

( 7 )->[33]->( 8 )
;; bb 33 artificial_defs: { }
;; bb 33 artificial_uses: { u311(3){ }u312(30){ }u313(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 204
;; lr  def      130 186 267 268
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; live  gen      130 186 267 268
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 130 139 186 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 130 139 186 203 204 205 206

( 7 )->[34]->( 8 )
;; bb 34 artificial_defs: { }
;; bb 34 artificial_uses: { u318(3){ }u319(30){ }u320(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp] 204
;; lr  def      130 186 269 270
;; live  in       3 [%r3] 30 [%r30] 89 [sfp] 96 127 139 203 204 205 206
;; live  gen      130 186 269 270
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 130 139 186 203 204 205 206
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 96 127 130 139 186 203 204 205 206

( 4 )->[35]->( 30 )
;; bb 35 artificial_defs: { }
;; bb 35 artificial_uses: { u325(3){ }u326(30){ }u327(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp]
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp]
;; lr  def      116
;; live  in       3 [%r3] 30 [%r30] 89 [sfp]
;; live  gen      116
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 116
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 116

( 6 )->[36]->( 30 )
;; bb 36 artificial_defs: { }
;; bb 36 artificial_uses: { u328(3){ }u329(30){ }u330(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp]
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp]
;; lr  def      116
;; live  in       3 [%r3] 30 [%r30] 89 [sfp]
;; live  gen      116
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 116
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 116

( 8 )->[37]->( 30 )
;; bb 37 artificial_defs: { }
;; bb 37 artificial_uses: { u331(3){ }u332(30){ }u333(89){ }}
;; lr  in       3 [%r3] 30 [%r30] 89 [sfp]
;; lr  use      3 [%r3] 30 [%r30] 89 [sfp]
;; lr  def      116
;; live  in       3 [%r3] 30 [%r30] 89 [sfp]
;; live  gen      116
;; live  kill    
;; lr  out      3 [%r3] 30 [%r30] 89 [sfp] 116
;; live  out      3 [%r3] 30 [%r30] 89 [sfp] 116

( 32 )->[1]->( )
;; bb 1 artificial_defs: { }
;; bb 1 artificial_uses: { u334(3){ }u335(28){ }u336(30){ }u337(89){ }}
;; lr  in       3 [%r3] 28 [%r28] 30 [%r30] 89 [sfp]
;; lr  use      3 [%r3] 28 [%r28] 30 [%r30] 89 [sfp]
;; lr  def     
;; live  in       3 [%r3] 28 [%r28] 30 [%r30] 89 [sfp]
;; live  gen     
;; live  kill    
;; lr  out     
;; live  out


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
                   ` (4 preceding siblings ...)
  2011-04-05  1:12 ` danglin at gcc dot gnu.org
@ 2011-04-05  5:54 ` steven at gcc dot gnu.org
  2011-04-05 11:05 ` rguenth at gcc dot gnu.org
                   ` (3 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: steven at gcc dot gnu.org @ 2011-04-05  5:54 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

--- Comment #6 from Steven Bosscher <steven at gcc dot gnu.org> 2011-04-05 05:54:08 UTC ---
Not really. I meant:

Breakpoint 3, mark_oprs_set (insn=0x7ffff6edc140) at
../../trunk/gcc/cprop.c:538
538       struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
(gdb) p debug_rtx(insn)
(jump_insn 171 170 248 31 (set (pc)
        (if_then_else (eq (reg/v:SI 158 [ rval ])
                (const_int 7 [0x7]))
            (label_ref:SI 248)
            (pc))) ../../gcc/libcpp/charset.c:481 25 {*pa.md:1330}
     (expr_list:REG_BR_PROB (const_int 9550 [0x254e])
        (nil))
 -> 248)
$12 = void
(gdb) p insn_info
$14 = (struct df_insn_info *) 0x14ca078
(gdb) call df_insn_debug(insn,false,stderr)
insn 171 luid 0 defs { } uses { u226(158)} eq uses { } mws 
(gdb) cont
Continuing.

Breakpoint 3, mark_oprs_set (insn=0x7ffff6edc140) at
../../trunk/gcc/cprop.c:538
538       struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
(gdb) p debug_rtx(insn)
(jump_insn/v 171 170 257 29 (set (pc)
        (if_then_else (eq (reg/v:SI 158 [ rval ])
                (const_int 7 [0x7]))
            (label_ref:SI 257)
            (pc))) ../../gcc/libcpp/charset.c:481 25 {*pa.md:1330}
     (expr_list:REG_BR_PROB (const_int 9550 [0x254e])
        (nil))
 -> 257)
$13 = void
(gdb) p insn_info
$15 = (struct df_insn_info *) 0x0
(gdb) # So the insn is not even known anymore in DF
(gdb) call df_insn_debug(insn,false,stderr)

Program received signal SIGSEGV, Segmentation fault.
0x000000000063d9cb in df_insn_uid_debug (uid=171, follow_chain=0 '\0',
file=0x7ffff7bd8860) at ../../trunk/gcc/df-core.c:2113
2113      fprintf (file, "insn %d luid %d",
The program being debugged was signaled while in a function called from GDB.
GDB remains in the frame where the signal was received.
To change this behavior use "set unwindonsignal on"
Evaluation of the expression containing the function (df_insn_debug) will be
abandoned.
(gdb) 
eq uses { } mws


The problem here is that INSN has been deleted (its INSN_DELETED_P flag is set)
and the basic block referencing it is empty:
(gdb) p debug_bb_n(29)
;; basic block 29, loop depth 1, count 0
;; prev block 28, next block 39
;; pred:       27
;; succ:       30 [100.0%]  (fallthru)
;; bb 29 artificial_defs: { }
;; bb 29 artificial_uses: { u223(3){ }u224(30){ }u225(89){ }}
;; lr  in        3 [%r3] 30 [%r30] 89 [sfp] 96 158 196 197 198 199
;; lr  use       3 [%r3] 30 [%r30] 89 [sfp] 158
;; lr  def 
;; live  in      3 [%r3] 30 [%r30] 89 [sfp] 96 158 196 197 198 199
;; live  gen    
;; live  kill   

(code_label 169 19 170 29 211 "" [1 uses])
(note 170 169 257 29 [bb 29] NOTE_INSN_BASIC_BLOCK)
;; lr  out       3 [%r3] 30 [%r30] 89 [sfp] 96 158 196 197 198 199
;; live  out     3 [%r3] 30 [%r30] 89 [sfp] 96 158 196 197 198 199


Could you please try if this patch restores bootstrap for you?

Index: cprop.c
===================================================================
--- cprop.c    (revision 171948)
+++ cprop.c    (working copy)
@@ -1797,8 +1797,8 @@ one_cprop_pass (void)
         /* Keep track of everything modified by this insn.  */
         /* ??? Need to be careful w.r.t. mods done to INSN.
                Don't call mark_oprs_set if we turned the
-               insn into a NOTE.  */
-        if (! NOTE_P (insn))
+               insn into a NOTE, or deleted the insn.  */
+        if (! NOTE_P (insn) && ! INSN_DELETED_P (insn))
           mark_oprs_set (insn);
           }
     }


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
                   ` (5 preceding siblings ...)
  2011-04-05  5:54 ` steven at gcc dot gnu.org
@ 2011-04-05 11:05 ` rguenth at gcc dot gnu.org
  2011-04-05 12:21 ` steven at gcc dot gnu.org
                   ` (2 subsequent siblings)
  9 siblings, 0 replies; 11+ messages in thread
From: rguenth at gcc dot gnu.org @ 2011-04-05 11:05 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

Richard Guenther <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |4.7.0


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
                   ` (6 preceding siblings ...)
  2011-04-05 11:05 ` rguenth at gcc dot gnu.org
@ 2011-04-05 12:21 ` steven at gcc dot gnu.org
  2011-04-05 18:15 ` steven at gcc dot gnu.org
  2011-04-05 18:16 ` steven at gcc dot gnu.org
  9 siblings, 0 replies; 11+ messages in thread
From: steven at gcc dot gnu.org @ 2011-04-05 12:21 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

--- Comment #7 from Steven Bosscher <steven at gcc dot gnu.org> 2011-04-05 12:03:38 UTC ---
OK, confirmed that cprop_insn makes the insn deleted, in the second CPROP pass:

Breakpoint 3, one_cprop_pass () at ../../trunk/gcc/cprop.c:1799
1799                    changed |= cprop_insn (insn);
(gdb) p debug_rtx(insn)
(jump_insn 214 213 303 29 (set (pc)
        (if_then_else (eq (reg/v:SI 202 [ rval ])
                (const_int 7 [0x7]))
            (label_ref:SI 303)
            (pc))) charset.i:106 25 {*pa.md:1330}
     (expr_list:REG_BR_PROB (const_int 9550 [0x254e])
        (nil))
 -> 303)
$12 = void
(gdb) next
1805                    if (! NOTE_P (insn))
(gdb) p debug_rtx(insn)
(jump_insn/v 214 213 303 29 (set (pc)
        (if_then_else (eq (reg/v:SI 202 [ rval ])
                (const_int 7 [0x7]))
            (label_ref:SI 303)
            (pc))) charset.i:106 25 {*pa.md:1330}
     (expr_list:REG_BR_PROB (const_int 9550 [0x254e])
        (nil))
 -> 303)
$13 = void
(gdb)

CPROP finds that rval==22 and folds away the comparsion "(eq (rval==22) (7))"
in cprop_jump, and then goes on to:

  /* If this is now a no-op delete it, otherwise this must be a valid insn.  */
  if (new_rtx == pc_rtx)
    delete_insn (jump);

I also verified that the same occurred before my patch, i.e. we were doing
mark_oprs_set on dead/deleted insns.

I'll submit the patch.


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
                   ` (7 preceding siblings ...)
  2011-04-05 12:21 ` steven at gcc dot gnu.org
@ 2011-04-05 18:15 ` steven at gcc dot gnu.org
  2011-04-05 18:16 ` steven at gcc dot gnu.org
  9 siblings, 0 replies; 11+ messages in thread
From: steven at gcc dot gnu.org @ 2011-04-05 18:15 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

--- Comment #8 from Steven Bosscher <steven at gcc dot gnu.org> 2011-04-05 18:15:08 UTC ---
Author: steven
Date: Tue Apr  5 18:15:04 2011
New Revision: 171994

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=171994
Log:
    PR middle-end/48441
    * cprop.c (one_cprop_pass): Do not mark_oprs_set of deleted insns.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/cprop.c


^ permalink raw reply	[flat|nested] 11+ messages in thread

* [Bug middle-end/48441] [4.7 Regression] ICE in mark_oprs_set
  2011-04-04 22:27 [Bug middle-end/48441] New: [4.7 Regression] ICE in mark_oprs_set danglin at gcc dot gnu.org
                   ` (8 preceding siblings ...)
  2011-04-05 18:15 ` steven at gcc dot gnu.org
@ 2011-04-05 18:16 ` steven at gcc dot gnu.org
  9 siblings, 0 replies; 11+ messages in thread
From: steven at gcc dot gnu.org @ 2011-04-05 18:16 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48441

Steven Bosscher <steven at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |FIXED

--- Comment #9 from Steven Bosscher <steven at gcc dot gnu.org> 2011-04-05 18:16:34 UTC ---
Eet eez feexeth.


^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2011-04-05 18:16 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
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2011-04-04 22:31 ` [Bug middle-end/48441] " dave at hiauly1 dot hia.nrc.ca
2011-04-04 22:37 ` danglin at gcc dot gnu.org
2011-04-04 22:46 ` steven at gcc dot gnu.org
2011-04-04 22:50 ` steven at gcc dot gnu.org
2011-04-05  1:12 ` danglin at gcc dot gnu.org
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