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From: "ramana at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/48789] missed ARM optimization: use LDMIA
Date: Wed, 27 Jul 2011 16:40:00 -0000	[thread overview]
Message-ID: <bug-48789-4-Sl5ioXgVC8@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-48789-4@http.gcc.gnu.org/bugzilla/>

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48789

Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |ramana at gcc dot gnu.org

--- Comment #4 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> 2011-07-27 16:40:09 UTC ---
There are a number of problems and not all of them are related to the backend. 


- ldm / stm aren't really first class citizens as far as GCC is concerned .
There is no way today of getting the register allocator to forcefully use
increasing addresses as a metric of choosing where to do what. 

- I suspect the performance issues you are seeing are with the number of spills
and fills that are being generated in this case. If you tried -fsched-pressure
life becomes much better and in fact the amount of stack space used is 0 . I
haven't run any benchmarks to see if in this particular case you get better
performance .


      parent reply	other threads:[~2011-07-27 16:40 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-04-27 11:24 [Bug target/48789] New: " edwintorok at gmail dot com
2011-04-27 11:15 ` [Bug target/48789] " edwintorok at gmail dot com
2011-04-27 11:20 ` edwintorok at gmail dot com
2011-04-27 11:20 ` edwintorok at gmail dot com
2011-07-27 16:40 ` ramana at gcc dot gnu.org [this message]

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