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From: "ibolton at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/48808] ICE in spill_failure, at reload1.c:2113 Date: Tue, 03 May 2011 11:00:00 -0000 [thread overview] Message-ID: <bug-48808-4-fyxw1lfU2n@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-48808-4@http.gcc.gnu.org/bugzilla/> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48808 Ian Bolton <ibolton at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- Keywords| |ice-on-valid-code Status|UNCONFIRMED |NEW Last reconfirmed| |2011.05.03 10:54:06 CC| |ibolton at gcc dot gnu.org Ever Confirmed|0 |1 Known to fail| |4.7.0 --- Comment #1 from Ian Bolton <ibolton at gcc dot gnu.org> 2011-05-03 10:54:06 UTC --- Confirmed on r173122 of trunk, using the command-line args provided by the reporter. I have managed to traced it back to happening somewhere between r172185 (works) and r172316 (ICEs) of trunk. Looking through the Changelogs for "reload", the most likely candidates are: r172297 | cltang | 2011-04-12 05:42:55 +0100 (Tue, 12 Apr 2011) | 10 lines 2011-04-11 Chung-Lin Tang <cltang@codesourcery.com> Richard Earnshaw <rearnsha@arm.com> PR target/48250 * config/arm/arm.c (arm_legitimize_reload_address): Update cases to use sign-magnitude offsets. Reject unsupported unaligned cases. Add detailed description in comments. * config/arm/arm.md (reload_outdf): Disable for ARM mode; change condition from TARGET_32BIT to TARGET_ARM. r172231 | aesok | 2011-04-09 20:10:45 +0100 (Sat, 09 Apr 2011) | 8 lines * expr.c (expand_expr_real_1): Use add_to_hard_reg_set function instead of loop. * sel-sched.c (mark_unavailable_hard_regs): Likewise. * function.c (record_hard_reg_sets): Likewise. * ira.c (compute_regs_asm_clobbered): Likewise. * sched-deps.c (sched_analyze_1): Likewise. * reload1.c (mark_reload_reg_in_use, choose_reload_regs): Likewise. r172197 | danglin | 2011-04-08 17:21:39 +0100 (Fri, 08 Apr 2011) | 12 lines PR target/48366 * config/pa/pa.c (hppa_register_move_cost): Increase to 18 cost of move from floating point to shift amount register . (emit_move_sequence): Remove secondary reload support for floating point to shift amount amount register copies. (pa_secondary_reload): Return GENERAL_REGS for floating point/shift amount register copies. * config/pa/pa32-regs.h (HARD_REGNO_MODE_OK): For shift amount register, return false if mode isn't a scalar integer mode. * config/pa/pa64-regs.h (HARD_REGNO_MODE_OK): Likewise. I don't have more time to devote to investigating this today, but hopefully someone else will be able to work out which change it was.
next prev parent reply other threads:[~2011-05-03 11:00 UTC|newest] Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top 2011-04-28 17:14 [Bug target/48808] New: " rmansfield at qnx dot com 2011-05-03 11:00 ` ibolton at gcc dot gnu.org [this message] 2011-05-03 19:21 ` [Bug target/48808] " rmansfield at qnx dot com 2011-06-01 19:47 ` rsandifo at gcc dot gnu.org 2011-06-03 21:14 ` [Bug rtl-optimization/48808] " ramana at gcc dot gnu.org 2015-06-24 23:50 ` ramana at gcc dot gnu.org
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