From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id EB0A23858C54; Tue, 23 May 2023 19:05:52 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EB0A23858C54 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684868752; bh=9ZVaxpmkOvDT/nimVqH5MEOmYazt/VU2RNGeyTxKgMM=; h=From:To:Subject:Date:In-Reply-To:References:From; b=kvkzWkKc7wfcvVS2zZDrwsQLMmm0BZr7/3PTJEdc/W6sYE3esqSv1wqw0d2yqmuBX exUc2Lkc/lGFPHEkUuXTb+5ib+js/cqgH3k6sGvvKqL8O1FFeqhCGESBerOdGcVGqz hTY9Ktx1NLPxfYJm7H8i+nH8aKPkvsAYihlr/Qn0= From: "olegendo at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/49263] SH Target: underutilized "TST #imm, R0" instruction Date: Tue, 23 May 2023 19:05:52 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 4.6.1 X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: olegendo at gcc dot gnu.org X-Bugzilla-Status: REOPENED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: olegendo at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D49263 --- Comment #34 from Oleg Endo --- (In reply to Alexander Klepikov from comment #33) > Created attachment 55142 [details] > Disable dynamic shift instructions patch First of all, thanks for digging into this. This issue has been a can of worms, due to all sorts of reasons. As you have discovered, some code patterns take the shift instruction route, which is basically decided earlier by the various middle-end optimizations.= =20 There have also been some changes to those parts recently, but I haven't be= en watching what it does for SH. > unsigned int f(char v){ > return (v & FLAG) =3D=3D FLAG; > } Bit-tests of char and unsigned char should be covered by the test-suite and should work -- at least originally. However, what might be triggering this problem is the '=3D=3D FLAG' comparison. When I was working on this issue = I only used '=3D=3D 0' or '!=3D 0' comparison. I can imagine that your test code = triggers some other middle end optimizations and hence we get this. Can you try to rewrite your test code to something like this? unsigned int f(char v){ return (v & FLAG) !=3D 0; } ... and see if it generates the tst instruction as expected? > I also compiled my project with '-m2e' and new '-mdisable-dynshift' > options and tested it in SH-2E mone on Renesas's emulator that comes > with High-performance Embedded Workshop and all unit tests run as expecte= d. I'm not sure what the purpose of the '-mdisable-dynshift' option would be h= ere though. For '-m2e' TARGET_DYNSHIFT is already 'false'. So the option seems misnamed.=