From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22779 invoked by alias); 19 Jun 2011 16:42:33 -0000 Received: (qmail 22768 invoked by uid 22791); 19 Jun 2011 16:42:32 -0000 X-SWARE-Spam-Status: No, hits=-2.7 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00,TW_XF X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sun, 19 Jun 2011 16:42:19 +0000 From: "oleg.endo@t-online.de" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/49263] SH Target: underutilized "TST #imm, R0" instruction X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: oleg.endo@t-online.de X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Sun, 19 Jun 2011 16:42:00 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2011-06/txt/msg01686.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49263 --- Comment #3 from Oleg Endo 2011-06-19 16:42:01 UTC --- Thanks for having a look at it Kaz. Yes, the fiddling with the combine pass is fragile. I've tried out your peephole idea. It works in most cases but not all the time. E.g. it doesn't catch the following example: int test_imm (int i) { return (i & 3) ? 20 : 40; } mov #3,r1 and r1,r4 tst r4,r4 bt/s .L5 mov #40,r0 mov #20,r0 .L5: rts nop Also the following... int test_imm (int* i) { return (*i & 255) ? 20 : 40; } becomes on little endian (OK): mov.b @r4,r1 tst r1,r1 bt/s .L10 mov #40,r0 mov #20,r0 .L10: rts nop but on big endian (NG): mov.l @r4,r1 extu.b r1,r1 tst r1,r1 bt/s .L10 mov #40,r0 mov #20,r0 .L10: rts nop I'll give the thing another try. Regarding the change to the andcosts function, the following should be better: --- sh.c (revision 175188) +++ sh.c (working copy) @@ -243,7 +243,7 @@ static int flow_dependent_p (rtx, rtx); static void flow_dependent_p_1 (rtx, const_rtx, void *); static int shiftcosts (rtx); -static int andcosts (rtx); +static int and_xor_ior_costs (rtx, int code); static int addsubcosts (rtx); static int multcosts (rtx); static bool unspec_caller_rtx_p (rtx); @@ -2841,14 +2841,14 @@ return shift_insns[value]; } -/* Return the cost of an AND operation. */ +/* Return the cost of an AND/XOR/IOR operation. */ static inline int -andcosts (rtx x) +and_xor_ior_costs (rtx x, int code) { int i; - /* Anding with a register is a single cycle and instruction. */ + /* register x register is a single cycle instruction. */ if (!CONST_INT_P (XEXP (x, 1))) return 1; @@ -2864,17 +2864,17 @@ } /* These constants are single cycle extu.[bw] instructions. */ - if (i == 0xff || i == 0xffff) + if ((i == 0xff || i == 0xffff) && code == AND) return 1; - /* Constants that can be used in an and immediate instruction in a single + /* Constants that can be used in an instruction with an immediate are a single cycle, but this requires r0, so make it a little more expensive. */ if (CONST_OK_FOR_K08 (i)) return 2; - /* Constants that can be loaded with a mov immediate and an and. + /* Constants that can be loaded with a mov immediate need one more cycle. This case is probably unnecessary. */ if (CONST_OK_FOR_I08 (i)) return 2; - /* Any other constants requires a 2 cycle pc-relative load plus an and. + /* Any other constant requires an additional 2 cycle pc-relative load. This case is probably unnecessary. */ return 3; } @@ -3043,7 +3043,9 @@ return true; case AND: - *total = COSTS_N_INSNS (andcosts (x)); + case XOR: + case IOR: + *total = COSTS_N_INSNS (and_xor_ior_costs (x, code)); return true; case MULT: