[Bug target/49385] New: Invalid RTL intstruction for ARM

[Bug target/49385] New: Invalid RTL intstruction for ARM

[revital.eres at linaro dot org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385

           Summary: Invalid RTL intstruction for ARM
           Product: gcc
           Version: 4.7.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: revital.eres@linaro.org


Created attachment 24504
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=24504
The test to reproduce the RTL instruction.

I see the following invalid mem to mem RTL instruction in test2.c.189r.sched1
when compiling: "test2.c -O2   -mthumb -da -march=armv7-a" with trunk -r174982:

configured with:

--target=arm-linux-gnueabi --enable-__cxa_atexit --disable-nls
--with-float=softfp --with-fpu=vfp --disable-bootstrap
target_alias=arm-linux-gnueabi --enable-languages=c,fortran,lto

(insn 52 50 54 3 (set (mem:HI (plus:SI (reg:SI 167 [ ivtmp.14 ])
                (const_int 2 [0x2])) [5 MEM[base: D.2088_27, offset: 2B]+0 S2
A16])
        (mem:HI (plus:SI (reg:SI 172 [ ivtmp.11 ])
                (const_int 2 [0x2])) [3 MEM[base: D.2087_26, offset: 2B]+0 S2
A16])) test2.c:75 710 {*thumb2_movhi_insn}
     (nil))

[Bug target/49385] Invalid RTL intstruction for ARM

[mikpe at it dot uu.se]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385

--- Comment #1 from Mikael Pettersson <mikpe at it dot uu.se> 2011-06-13 11:20:23 UTC ---
I get no ICE on this with 4.7 r174986, even with --enable-checking, and the
assembler doesn't complain about the generated code.

So what is the problem?

[Bug target/49385] Invalid RTL intstruction for ARM

[revital.eres at linaro dot org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385

--- Comment #2 from revital.eres at linaro dot org 2011-06-13 11:26:44 UTC ---
(In reply to comment #1)
> I get no ICE on this with 4.7 r174986, even with --enable-checking, and the
> assembler doesn't complain about the generated code.
> So what is the problem?

The generated code does not produce ICE. However the RTL instruction is not
valid as far as I understand so it should not be generated at any stage of the
compilation.

[Bug target/49385] Invalid RTL intstruction for ARM

[revital.eres at linaro dot org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385

--- Comment #3 from revital.eres at linaro dot org 2011-06-15 11:26:32 UTC ---
(In reply to comment #0)
> Created attachment 24504 [details]
> The test to reproduce the RTL instruction.
> I see the following invalid mem to mem RTL instruction in test2.c.189r.sched1

btw, the first dump file which contains this invalid mem-mem instruction is
combine.

[Bug target/49385] Invalid RTL intstruction for ARM

[ramana at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385

--- Comment #4 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> 2011-06-20 12:16:04 UTC ---
Author: ramana
Date: Mon Jun 20 12:15:58 2011
New Revision: 175208

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=175208
Log:
Fix PR target/49385


2011-06-20  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

    PR target/49385
    * config/arm/thumb2.md (*thumb2_movhi_insn): Make sure atleast
    one of the operands is a register.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/arm/thumb2.md

[Bug target/49385] Invalid RTL intstruction for ARM

[ramana at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385

Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
                 CC|                            |ramana at gcc dot gnu.org
         Resolution|                            |FIXED
   Target Milestone|---                         |4.7.0

--- Comment #5 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> 2011-06-20 14:34:07 UTC ---
Fixed now. 

ramana

[Bug target/49385] Invalid RTL intstruction for ARM

[jye2 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385

--- Comment #6 from jye2 at gcc dot gnu.org 2011-09-19 08:13:09 UTC ---
Author: jye2
Date: Mon Sep 19 08:13:02 2011
New Revision: 178955

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178955
Log:
2011-09-19  Jiangning Liu  <jiangning.liu@arm.com>

    Backport r175427 from mainline
    2011-06-27  Richard Guenther  <rguenther@suse.de>

    PR tree-optimization/49169
    * fold-const.c (get_pointer_modulus_and_residue): Don't rely on
    the alignment of function decls.

2011-09-19  Jiangning Liu  <jiangning.liu@arm.com>

    Backport r175208 from mainline
    2011-06-20  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

    PR target/49385
    * config/arm/thumb2.md (*thumb2_movhi_insn): Make sure atleast
    one of the operands is a register.

2011-09-19  Jiangning Liu  <jiangning.liu@arm.com>

    Backport r174803 from mainline
    2011-06-08  Julian Brown  <julian@codesourcery.com>

    * config/arm/arm.c (arm_libcall_uses_aapcs_base): Use correct ABI
    for double-precision helper functions in hard-float mode if only
    single-precision arithmetic is supported in hardware.


Modified:
    branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
    branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
    branches/ARM/embedded-4_6-branch/gcc/config/arm/thumb2.md
    branches/ARM/embedded-4_6-branch/gcc/fold-const.c