public inbox for gcc-bugs@sourceware.org
help / color / mirror / Atom feed
* [Bug target/49526] New: ARM missed optimization: SMMUL instruction
@ 2011-06-24 22:44 siarhei.siamashka at gmail dot com
  2011-06-24 22:49 ` [Bug target/49526] " siarhei.siamashka at gmail dot com
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: siarhei.siamashka at gmail dot com @ 2011-06-24 22:44 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49526

           Summary: ARM missed optimization: SMMUL instruction
           Product: gcc
           Version: 4.7.0
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: siarhei.siamashka@gmail.com


$ cat test.c

int smmul(int a, int b) { return ((long long)a * b) >> 32; }

$ arm-none-linux-gnueabi-gcc -O2 -S -mcpu=cortex-a8 test.c
$ cat test.s
        .cpu cortex-a8
        .fpu softvfp
        .eabi_attribute 20, 1
        .eabi_attribute 21, 1
        .eabi_attribute 23, 3
        .eabi_attribute 24, 1
        .eabi_attribute 25, 1
        .eabi_attribute 26, 2
        .eabi_attribute 30, 2
        .eabi_attribute 18, 4
        .file   "test.c"
        .text
        .align  2
        .global smmul
        .type   smmul, %function
smmul:
        @ args = 0, pretend = 0, frame = 0
        @ frame_needed = 0, uses_anonymous_args = 0
        @ link register save eliminated.
        smull   r0, r1, r0, r1
        mov     r0, r1
        bx      lr
        .size   smmul, .-smmul
        .ident  "GCC: (GNU) 4.7.0 20110624 (experimental)"
        .section        .note.GNU-stack,"",%progbits


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [Bug target/49526] ARM missed optimization: SMMUL instruction
  2011-06-24 22:44 [Bug target/49526] New: ARM missed optimization: SMMUL instruction siarhei.siamashka at gmail dot com
@ 2011-06-24 22:49 ` siarhei.siamashka at gmail dot com
  2011-06-27 21:58 ` [Bug target/49526] extra move instruction for smmul rearnsha at gcc dot gnu.org
  2011-06-27 21:59 ` rearnsha at gcc dot gnu.org
  2 siblings, 0 replies; 4+ messages in thread
From: siarhei.siamashka at gmail dot com @ 2011-06-24 22:49 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49526

--- Comment #1 from Siarhei Siamashka <siarhei.siamashka at gmail dot com> 2011-06-24 22:48:46 UTC ---
And clang 2.9 has no problems optimizing this code:

$ cat test.c

int smmul(int a, int b) { return ((long long)a * b) >> 32; }

$ clang -ccc-host-triple arm-none-linux -O2 -mcpu=cortex-a8 -S test.c
$ cat test.s
        .syntax unified
        .cpu cortex-a8
        .eabi_attribute 6, 10
        .eabi_attribute 7, 65
        .eabi_attribute 8, 1
        .eabi_attribute 9, 2
        .fpu neon
        .eabi_attribute 10, 3
        .eabi_attribute 12, 1
        .eabi_attribute 20, 1
        .eabi_attribute 21, 1
        .eabi_attribute 23, 3
        .eabi_attribute 24, 1
        .eabi_attribute 25, 1
        .file   "test.c"
        .text
        .globl  smmul
        .align  2
        .type   smmul,%function
smmul:
        smmul   r0, r1, r0
        bx      lr
.Ltmp0:
        .size   smmul, .Ltmp0-smmul


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [Bug target/49526] extra move instruction for smmul
  2011-06-24 22:44 [Bug target/49526] New: ARM missed optimization: SMMUL instruction siarhei.siamashka at gmail dot com
  2011-06-24 22:49 ` [Bug target/49526] " siarhei.siamashka at gmail dot com
@ 2011-06-27 21:58 ` rearnsha at gcc dot gnu.org
  2011-06-27 21:59 ` rearnsha at gcc dot gnu.org
  2 siblings, 0 replies; 4+ messages in thread
From: rearnsha at gcc dot gnu.org @ 2011-06-27 21:58 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49526

--- Comment #2 from Richard Earnshaw <rearnsha at gcc dot gnu.org> 2011-06-27 21:58:26 UTC ---
Confirmed.  Also need patterns for the accumulate and subtract variants, plus
rounding variants.


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [Bug target/49526] extra move instruction for smmul
  2011-06-24 22:44 [Bug target/49526] New: ARM missed optimization: SMMUL instruction siarhei.siamashka at gmail dot com
  2011-06-24 22:49 ` [Bug target/49526] " siarhei.siamashka at gmail dot com
  2011-06-27 21:58 ` [Bug target/49526] extra move instruction for smmul rearnsha at gcc dot gnu.org
@ 2011-06-27 21:59 ` rearnsha at gcc dot gnu.org
  2 siblings, 0 replies; 4+ messages in thread
From: rearnsha at gcc dot gnu.org @ 2011-06-27 21:59 UTC (permalink / raw)
  To: gcc-bugs

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49526

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2011.06.27 21:59:03
                 CC|                            |rearnsha at gcc dot gnu.org
     Ever Confirmed|0                           |1


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2011-06-27 21:59 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-06-24 22:44 [Bug target/49526] New: ARM missed optimization: SMMUL instruction siarhei.siamashka at gmail dot com
2011-06-24 22:49 ` [Bug target/49526] " siarhei.siamashka at gmail dot com
2011-06-27 21:58 ` [Bug target/49526] extra move instruction for smmul rearnsha at gcc dot gnu.org
2011-06-27 21:59 ` rearnsha at gcc dot gnu.org

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).