From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13688 invoked by alias); 14 Aug 2011 21:01:13 -0000 Received: (qmail 13680 invoked by uid 22791); 14 Aug 2011 21:01:12 -0000 X-SWARE-Spam-Status: No, hits=-2.9 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sun, 14 Aug 2011 21:00:58 +0000 From: "tanzhangxi at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC Date: Sun, 14 Aug 2011 22:43:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Keywords: X-Bugzilla-Severity: major X-Bugzilla-Who: tanzhangxi at gmail dot com X-Bugzilla-Status: RESOLVED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2011-08/txt/msg01306.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #8 from Zhangxi Tan 2011-08-14 21:00:40 UTC --- Thanks for the clear explanation. I agree that a memory barrier would solve this issue. Regarding the spinlock_unlock in linux, the regular arch_spin_unlock is implemented with a single inline assembly. That will prevent the memory reordering in C. However, for the 32-bit port the arch_write_unlock is still defined as the following without a memory barrier in arch/sparc/include/asm/spinlock_32.h #define arch_write_unlock(rw) do { (rw)->lock = 0; } while(0) OTH, the 64-bit implemention is ok. Or did I miss something here. Anyway, I think this is a separated issue from this thread. (In reply to comment #6) > > The code is equivalent to > > > > volatile unsigned char lock; > > int remap_barrier; > > > > while (atomic_test_and_set(lock)) { > > while (lock) { > > ; > > } > > } > > remap_barrier++; > > lock = 0; > > > > Eric: could you let me know you you think the code inside function > > spinlock_lock(&remap_lock) is a NOP? > > I don't, you simply misquoted, I wrote "the end of the code". The first part > of the spinlock implementation is correct, in particular you have the required > memory barrier in spinlock_is_locked. The second part is not correct, as you > don't have the memory barrier in spinlock_unlock. > > > Also, the arch_write_lock/unlock in the SPARC port of Linux uses a very > > similar implementation. > > No, it precisely doesn't, it has the memory barrier in spinlock_unlock.