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From: "vmakarov at redhat dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/50107] [IRA, i386] allocates regiters in very non-optimal way
Date: Wed, 17 Aug 2011 22:29:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50107

--- Comment #6 from Vladimir Makarov <vmakarov at redhat dot com> 2011-08-17 22:21:13 UTC ---
(In reply to comment #4)
> Created attachment 25038 [details]
> A patch
> 
> This patch generates:
> 
>     movq    %rdi, %rdx
>     mulx    %rsi, %r10, %r9
>     addq    $3, %r9
>     adcq    $0, %r10
>     movq    %r9, k2(%rip)
>     movq    %r9, %rax
>     movq    %r10, k2+8(%rip)
>     movq    %r10, %rdx
>     ret

I don't think it is a good patch (changing register allocation order) because
it prefers new x86-64 registers and results in longer insns and bigger code for
many programs.

I am working on a patch to fix it in IRA.  I found a typo which is a reason for
such behaviour.  I think it will be ready tomorrow.