From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26610 invoked by alias); 13 Dec 2011 20:05:41 -0000 Received: (qmail 26601 invoked by uid 22791); 13 Dec 2011 20:05:40 -0000 X-SWARE-Spam-Status: No, hits=-2.9 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 13 Dec 2011 20:05:27 +0000 From: "vmakarov at redhat dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/50176] [4.7 Regression] 4.7 generates spill-fill dealing with char->int conversion Date: Tue, 13 Dec 2011 20:06:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: vmakarov at redhat dot com X-Bugzilla-Status: NEW X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 4.7.0 X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2011-12/txt/msg01411.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50176 --- Comment #9 from Vladimir Makarov 2011-12-13 20:04:04 UTC --- (In reply to comment #0) > Created attachment 25088 [details] > > > After expanding 4.7 contains: > > (insn 52 51 53 6 (set (reg:QI 83 [ D.2723 ]) > (mem:QI (plus:SI (reg/v/f:SI 75 [ inptr1 ]) > (reg/v:SI 117 [ col ])) [0 MEM[base: inptr1_19, index: col_90, > offset: 0B]+0 S1 A8])) test_4_6.c:42 -1 > (nil)) > > and 4.6 contains > > (insn 52 51 53 6 (parallel [ > (set (reg/v:SI 86 [ cb ]) > (zero_extend:SI (mem:QI (plus:SI (reg/v/f:SI 76 [ inptr1 ]) > (reg/v:SI 78 [ col ])) [0 MEM[base: inptr1_19, > index: col_22, offset: 0B]+0 S1 A8]))) > (clobber (reg:CC 17 flags)) > ]) test_4_6.c:42 -1 > (nil)) > > The reason of different outcome in RA is that p83 generated by 4.7 we can use only q regs vs. general regs for p86 generated by 4.6. It decreases # of possible hard regs for p83 in two times and failure to assign p83 a hard register. More accurately IRA assigns dx to p83 then reload spills p83 because it needs a hard register then reload asks IRA to reassign a hard register to p83 and IRA fails.