From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 6014 invoked by alias); 19 Sep 2011 16:37:12 -0000 Received: (qmail 5452 invoked by uid 22791); 19 Sep 2011 16:37:07 -0000 X-SWARE-Spam-Status: No, hits=-2.9 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 19 Sep 2011 16:36:53 +0000 From: "philip.stearns.andtr at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/50457] New: SH2A atomic functions Date: Mon, 19 Sep 2011 17:40:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: philip.stearns.andtr at gmail dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2011-09/txt/msg01345.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50457 Bug #: 50457 Summary: SH2A atomic functions Classification: Unclassified Product: gcc Version: 4.3.5 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unassigned@gcc.gnu.org ReportedBy: philip.stearns.andtr@gmail.com The SH specific atomic functions don't seem to work properly with the SH2A processor. An example function from the gcc/config/sh/linux-atomic.asm is as follows: #define ATOMIC_FETCH_AND_OP(OP,N,T) \ .global __sync_fetch_and_##OP##_##N; \ HIDDEN_FUNC(__sync_fetch_and_##OP##_##N); \ .align 2; \ __sync_fetch_and_##OP##_##N:; \ mova 1f, r0; \ mov r15, r1; \ mov #(0f-1f), r15; \ <<< SP modification 0: mov.##T @r4, r2; \ OP r2, r5; \ mov.##T r5, @r4; \ 1: mov r1, r15; \ <<< SP modification rts; \ mov r2, r0; \ ENDFUNC(__sync_fetch_and_##OP##_##N) Functions following this style cause the application to eventually crash. I think this may be related to the locking mechanism around the instructions making use of an on-board MMU, since the SP is loaded with a negative value. As the SH2A does not have an MMU this poses a problem. Replacing the SP modifying code with direct interrupt disabling/enabling resolves the problem and the application no longer crashes: #define ATOMIC_FETCH_AND_OP(OP,N,T,EXT) \ .global __sync_fetch_and_##OP##_##N; \ HIDDEN_FUNC(__sync_fetch_and_##OP##_##N); \ .align 2; \ __sync_fetch_and_##OP##_##N:; \ stc sr, r0; \ mov r0, r1; \ or #0xf0, r0; \ ldc r0, sr; \ <<< interrupt disable mov.##T @r4, r2; \ OP r2, r5; \ mov.##T r5, @r4; \ ldc r1, sr; \ <<< interrupt restore rts; \ EXT r2, r0; \ ENDFUNC(__sync_fetch_and_##OP##_##N)