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From: "kirill.yukhin at intel dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/50480] 10% performance regression on Spec2006 410.bwaves
Date: Tue, 27 Sep 2011 08:49:00 -0000	[thread overview]
Message-ID: <bug-50480-4-aR36sH8gL2@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-50480-4@http.gcc.gnu.org/bugzilla/>

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50480

--- Comment #4 from Yukhin Kirill <kirill.yukhin at intel dot com> 2011-09-27 08:31:35 UTC ---
(In reply to comment #3)
> For 32bit only it seems.  Supposedly a cost model issue, the register pressure
> will be higher and we have only half the number of SSE regs.

Richard, what's wrong maybe with cost model? If you're increasing liverange and
you have not as much registers (32-bit case), obviously register pressure will
increase and degrade performance. But again, how it is connected with cost
model?


  parent reply	other threads:[~2011-09-27  8:31 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-22 10:26 [Bug tree-optimization/50480] New: " kirill.yukhin at intel dot com
2011-09-22 10:29 ` [Bug tree-optimization/50480] " kirill.yukhin at intel dot com
2011-09-22 10:49 ` kirill.yukhin at intel dot com
2011-09-25 11:59 ` rguenth at gcc dot gnu.org
2011-09-27  8:49 ` kirill.yukhin at intel dot com [this message]
2011-09-27  9:00 ` rguenther at suse dot de
2012-04-20 23:29 ` meissner at gcc dot gnu.org

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