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From: "hjl.tools at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/50677] volatile forces load into register
Date: Mon, 24 Feb 2014 16:03:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50677

--- Comment #4 from H.J. Lu <hjl.tools at gmail dot com> ---
Combine generates

Trying 6, 7 -> 8:
Failed to match this instruction:
(set (mem/v:SI (reg/v/f:DI 85 [ i ]) [2 *i_2(D)+0 S4 A32])
    (plus:SI (mem/v:SI (reg/v/f:DI 85 [ i ]) [2 *i_2(D)+0 S4 A32])
        (const_int 1 [0x1])))

from

(insn 6 3 7 2 (set (reg:SI 83 [ D.1752 ])
        (mem/v:SI (reg/v/f:DI 85 [ i ]) [2 *i_2(D)+0 S4 A32])) x.i:1 90
{*movsi_
internal}
     (nil))
(insn 7 6 8 2 (parallel [
            (set (reg:SI 84 [ D.1752 ])
                (plus:SI (reg:SI 83 [ D.1752 ])
                    (const_int 1 [0x1])))
            (clobber (reg:CC 17 flags))
        ]) x.i:1 266 {*addsi_1}
     (expr_list:REG_DEAD (reg:SI 83 [ D.1752 ])
        (expr_list:REG_UNUSED (reg:CC 17 flags)
            (nil))))

Why doesn't combine include (clobber (reg:CC 17 flags))?