From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31608 invoked by alias); 23 Oct 2011 11:00:30 -0000 Received: (qmail 31590 invoked by uid 22791); 23 Oct 2011 11:00:29 -0000 X-SWARE-Spam-Status: No, hits=-2.8 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00,TW_AV,TW_ZJ X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sun, 23 Oct 2011 11:00:14 +0000 From: "ubizjak at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/50788] [4.7 Regression] ICE: in merge_overlapping_regs, at regrename.c:318 with -mavx -fpeel-loops -fstack-protector-all and __builtin_ia32_maskloadpd256 Date: Sun, 23 Oct 2011 11:00:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: ubizjak at gmail dot com X-Bugzilla-Status: ASSIGNED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: ubizjak at gmail dot com X-Bugzilla-Target-Milestone: 4.7.0 X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2011-10/txt/msg02356.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50788 --- Comment #5 from Uros Bizjak 2011-10-23 10:59:21 UTC --- (In reply to comment #3) > but the expanders have match_dup. Uros, would you mind taking it over? TIA. It is OK for expanders to have match_dup. We just don't want to have post-reload passes to trip on double-output to the same register. BTW: There is another spot with similar problem: @@ -8011,7 +8011,8 @@ [(set (mem:V16QI (match_operand:P 0 "register_operand" "D")) (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "x") (match_operand:V16QI 2 "register_operand" "x") - (mem:V16QI (match_dup 0))] + (mem:V16QI + (match_operand:P 3 "register_operand" "0"))] UNSPEC_MASKMOV))] "TARGET_SSE2" "%vmaskmovdqu\t{%2, %1|%1, %2}" While compilation won't break here, IMO we should tell the reload that we have matching constraint. BTW: This fun is all due to conditional maskmov store. We can't just set the memory, since preceding stores to the same location will be simply deleted.