[Bug tree-optimization/50789] Gather vectorization

["jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50789

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> 2011-10-19 09:02:26 UTC ---
(In reply to comment #2)
> We have something similar for SLP: if an access is not affine we just fill in
> what we can. But I don't really understand what can be filled in for f3/f4.

Well, we should be able to at least use TBAA in that case:
void
f5 (void)
{
  int i;
  for (i = 0; i < N; i++)
    k[i] += *l[i];
}
should be vectorizable too, as l[i] can't overlap k[i] (normal data dep) and
*l[i], being float read, can't alias with k[i] either (int).
Similarly perhaps:
void
f6 (float *__restrict f, float *__restrict *__restrict l)
{
  int i;
  for (i = 0; i < N; i++)
    f[i] += *l[i];
}
(though that one unlikely very soon).
With these gather accesses we can't do any runtime alias checking before the
loop, either we can prove there is no alias, or we can't vectorize.

> Can't we treat it as an unconditional load for the dr analysis purposes?

For that surely, but the conditional loads have other problems for the
vectorizer, currently that means control flow within the loop.  We'd need to
transform it (perhaps temporarily or using pattern recognizer) to something
without control flow that would still be clear on that the load is only
conditional.