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From: "kkojima at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/50814] SH Target: SHAD / SHLD instructions not used on SH2A
Date: Mon, 28 Nov 2011 13:58:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50814

--- Comment #5 from Kazumoto Kojima <kkojima at gcc dot gnu.org> 2011-11-28 13:43:16 UTC ---
BTW, when regtesting, I've found that there are many ICEs at -O0.
A typical one is gcc.c-torture/compile/20000923-1.c with -m2a -O0:

...: error: insn does not satisfy its constraints:
(insn 142 34 35 (set (mem/c:SI (plus:SI (reg/f:SI 14 r14)
                (const_int 36 [0x24])) [0 %sfp+-16 S4 A32])
        (reg:SI 150 fpul)) ... {movsi_ie}
     (nil))
...: internal compiler error: in extract_constrain_insn_cached, at recog.c:2052

which is solved by the hunk in the patch against PR50751

--- gcc/config/sh/sh.c.orig    2011-11-28 10:03:04.000000000 +0900
+++ gcc/config/sh/sh.c    2011-11-28 15:09:01.000000000 +0900
@@ -12432,6 +12432,10 @@ sh_secondary_reload (bool in_p, rtx x, r
   if (rclass != GENERAL_REGS && REG_P (x)
       && TARGET_REGISTER_P (REGNO (x)))
     return GENERAL_REGS;
+  /* If here fall back to loading FPUL register through general regs. 
+     Happens when FPUL has to be loaded from a reg allocated on the stack.  */
+  if (rclass == FPUL_REGS && !REG_P (x))
+    return GENERAL_REGS;
   return NO_REGS;
 }

Oleg, it seems that this is the right patch for an independent issue
described in your comment.  Could you please file it to the bugzilla
and propose that patch to the gcc-patch list?