From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31607 invoked by alias); 23 Jul 2013 08:21:44 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 25442 invoked by uid 48); 23 Jul 2013 08:19:40 -0000 From: "laurent.alfonsi at st dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/51244] [SH] Inefficient conditional branch and code around T bit Date: Tue, 23 Jul 2013 08:21:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 4.7.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: laurent.alfonsi at st dot com X-Bugzilla-Status: ASSIGNED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: olegendo at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2013-07/txt/msg01067.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51244 --- Comment #61 from Laurent Aflonsi --- Yes that's the point. L3 can be reached by another block (L2): tst r2,r2 mov #-1,r2 negc r2,r2 .L3: tst r2,r2 bt/s .L11 [...] .L2: mov.l @r4,r2 tst r2,r2 bra .L3 movt r2 The movt(L2) and the tst(L3) are both removed, and that's coherent for that run path, because it is preceded by the tst r2,r2. But that makes the first path incoherent because L3 can be reached by the very first block. I have written a first fix, too restrictive ("pr25869-19.c scan-assembler-not movt" is failing) : --- ./gcc/gcc/config/sh/sh.md.orig +++ ./gcc/gcc/config/sh/sh.md @@ -8523,7 +8523,8 @@ T bit. Notice that some T bit stores such as negc also modify the T bit. */ if (modified_between_p (get_t_reg_rtx (), s1.insn, testing_insn) - || modified_in_p (get_t_reg_rtx (), s1.insn)) + || modified_in_p (get_t_reg_rtx (), s1.insn) + || !no_labels_between_p(s1.insn, testing_insn)) operands[2] = NULL_RTX; break; The idea would be to check if "s1.insn block dominates testing_insn block", but I don't know how to write it at this stage. More generally, I'm surprised to see that optimization at mapping level, isn't this a generic problematic that should be handled at rtl dead code elimination stage on the T bit register ? Thanks, Laurent