From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8643 invoked by alias); 5 Dec 2011 18:08:32 -0000 Received: (qmail 8632 invoked by uid 22791); 5 Dec 2011 18:08:30 -0000 X-SWARE-Spam-Status: No, hits=-2.8 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00,TW_RJ X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 05 Dec 2011 18:08:15 +0000 From: "gjl at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/51425] New: [4.7 Regression] Compiler fails to produce SBIS/SBIC instructions Date: Mon, 05 Dec 2011 18:08:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: gjl at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2011-12/txt/msg00457.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51425 Bug #: 51425 Summary: [4.7 Regression] Compiler fails to produce SBIS/SBIC instructions Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Keywords: missed-optimization Severity: normal Priority: P3 Component: rtl-optimization AssignedTo: unassigned@gcc.gnu.org ReportedBy: gjl@gcc.gnu.org CC: eric.weddington@atmel.com Target: avr Versions <= 4.6 of avr-gcc produce the SBIC/SBIC (Skip one instruction if Bit in I/O is Clear/Set), but 4.7 fails to synthesize these instructions for bit numbers 0..6. Test program: #define PORTB (*((unsigned char volatile*) 0x38)) extern char c; void skip_1 (void) { if (PORTB & 0x20) c = 0; } void skip_2 (void) { if (!(PORTB & 0x20)) c = 0; } Compiled with $ avr-gcc -Os -S -dp -mmcu=atmega128 -fdump-rtl-combine-details Output with 4.7: skip_1: in r24,56-0x20 ; 6 *movqi/4 [length = 1] sbrs r24,5 ; 9 *sbrx_branchqi [length = 2] rjmp .L1 sts c,__zero_reg__ ; 11 *movqi/3 [length = 2] .L1: ret ; 28 return [length = 1] skip_2: in r24,56-0x20 ; 6 *movqi/4 [length = 1] sbrc r24,5 ; 9 *sbrx_branchqi [length = 2] rjmp .L6 sts c,__zero_reg__ ; 11 *movqi/3 [length = 2] .L6: ret ; 20 return [length = 1] Output with 4.6.2: skip_1: sbis 56-0x20,5 ; 10 *sbix_branch [length = 2] rjmp .L1 sts c,__zero_reg__ ; 12 *movqi/3 [length = 2] .L1: ret ; 22 return [length = 1] skip_2: sbic 56-0x20,5 ; 10 *sbix_branch [length = 2] rjmp .L3 sts c,__zero_reg__ ; 12 *movqi/3 [length = 2] .L3: ret ; 20 return [length = 1] *sbix_branch is a combine pattern that is matched by 4.6: Trying 6 -> 10: Successfully matched this instruction: (set (pc) (if_then_else (eq (zero_extract:HI (mem/v:QI (const_int 56 [0x38]) [0 MEM[(volatile unsigned char *)56B]+0 S1 A8]) (const_int 1 [0x1]) (const_int 5 [0x5])) (const_int 0 [0])) (label_ref:HI 15) (pc))) deferring deletion of insn with uid = 6. modifying insn i3 10 pc={(zero_extract([0x38],0x1,0x5)==0)?L15:pc} REG_BR_PROB: 0xf3c deferring rescan insn with uid = 10. but rejected by 4.7: Trying 6 -> 9: Failed to match this instruction: (set (pc) (if_then_else (eq (zero_extract:QI (mem/v:QI (const_int 56 [0x38]) [0 MEM[(volatile unsigned char *)56B]+0 S1 A8]) (const_int 1 [0x1]) (const_int 5 [0x5])) (const_int 0 [0])) (label_ref:HI 14) (pc))) 4.7 tries zero_extract:QI whereas 4.6 tried zero_extract:HI so that using QIHI mode iterator in *sbix_branch/*sbix_branch_tmp instead of HI maybe does the trick.