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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/51821] [4.5/4.6/4.7 Regression] 64bit > 32bit conversion produces incorrect results with optimizations
Date: Thu, 12 Jan 2012 08:04:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51821

--- Comment #11 from Uros Bizjak <ubizjak at gmail dot com> 2012-01-12 08:04:13 UTC ---
I think that DF is OK, the problem is in recog.c/peep2_find_free_register, with
this loop:

  while (from != to)
    {
      HARD_REG_SET this_live;

      from = peep2_buf_position (from + 1);
      gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
      REG_SET_TO_HARD_REG_SET (this_live, peep2_insn_data[from].live_before);
      IOR_HARD_REG_SET (live, this_live);
    }

Here we need to analyse the insn patterns for ALL sets and clobbers, not only
track live registers through the insn stream.