From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15585 invoked by alias); 12 Jan 2012 11:35:35 -0000 Received: (qmail 15458 invoked by uid 22791); 12 Jan 2012 11:35:35 -0000 X-SWARE-Spam-Status: No, hits=-2.8 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00,TW_ZJ X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 12 Jan 2012 11:35:22 +0000 From: "ubizjak at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/51821] [4.5/4.6/4.7 Regression] 64bit > 32bit conversion produces incorrect results with optimizations Date: Thu, 12 Jan 2012 11:35:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: ubizjak at gmail dot com X-Bugzilla-Status: ASSIGNED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: ebotcazou at gcc dot gnu.org X-Bugzilla-Target-Milestone: 4.5.4 X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2012-01/txt/msg01368.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51821 --- Comment #13 from Uros Bizjak 2012-01-12 11:34:40 UTC --- (In reply to comment #12) > > Here we need to analyse the insn patterns for ALL sets and clobbers, not only > > track live registers through the insn stream. > > I'm not sure I understand. If the peephole matches, then the insn pattern is > present in the insn stream with instantiated registers, so it's sufficient to > scan the insn stream. AFAICS the code doesn't see that edx is live after the > instruction because DF reports that only eax is; of course it's eax in DImode > so edx is "implicitly" live, but it's nevertheless live. Please look into "peep2_insn_data[from].live_before" array and "peep2_insn_data[from+1].live_before". You will see that the difference is only in ax register. This array is set with df_simulate_one_insn_forwards, and this particular function indeed clears set hard registers when REG_UNUSED note is found (this is OK for live analysis). The referred loop processes (insn 7 19 16 2 (parallel [ (set (reg:DI 0 ax [65]) (ashift:DI (const_int -1 [0xffffffffffffffff]) (reg:QI 2 cx [orig:63 shift_size ] [63]))) (clobber (reg:CC 17 flags)) ]) pr51821.c:8 489 {*ashldi3_doubleword} (expr_list:REG_DEAD (reg:QI 2 cx [orig:63 shift_size ] [63]) (expr_list:REG_UNUSED (reg:CC 17 flags) (expr_list:REG_UNUSED (reg:SI 1 dx) (expr_list:REG_EQUAL (ashift:DI (const_int -1 [0xffffffffffffffff]) (subreg:QI (reg/v:SI 2 cx [orig:63 shift_size ] [63]) 0)) (nil)))))) and since the difference between live registers before/after the insn is only ax register, the loop claims others (including dx reg) as "available". The calculation, which register is _NOT_CLOBBERED_ by the pattern from "live" information is thus not enough, we have to look into the pattern and mark all hard registers that are set or clobbered as _NOT_AVAILABLE_ in the register set.