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From: "ramana at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/51876] [4.7 regression] Recent extra neon related testsuite regressions on arm-linux-gnueabi
Date: Tue, 17 Jan 2012 13:59:00 -0000 [thread overview]
Message-ID: <bug-51876-4-y45kRdQdAK@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-51876-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51876
--- Comment #3 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> 2012-01-17 13:48:12 UTC ---
(In reply to comment #2)
> Created attachment 26349 [details]
> gcc47-pr51876.patch
>
> Untested fix (well, tested that the ICEs are gone on all these tests with a
> cross). vswp just seems to swap two vector registers, so it doesn't matter
> which one is the first and which is the second, and the pattern only has two
> operands, not 3.
> Ramana, could you please bootstrap/regtest it on some real hw?
Doesn't matter which order you do the vswp it's just a swap of 2 vector
registers.
Looks obvious to me.
Ramana
next prev parent reply other threads:[~2012-01-17 13:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-17 1:31 [Bug target/51876] New: " ramana at gcc dot gnu.org
2012-01-17 1:36 ` [Bug target/51876] " ramana at gcc dot gnu.org
2012-01-17 10:19 ` rguenth at gcc dot gnu.org
2012-01-17 12:15 ` jakub at gcc dot gnu.org
2012-01-17 13:59 ` ramana at gcc dot gnu.org [this message]
2012-01-19 13:00 ` rguenth at gcc dot gnu.org
2012-01-19 13:26 ` jakub at gcc dot gnu.org
2012-01-19 16:09 ` ramana at gcc dot gnu.org
2012-01-19 17:14 ` jakub at gcc dot gnu.org
2012-01-19 18:05 ` jakub at gcc dot gnu.org
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