[Bug other/52278] New: [avr] inefficient register allocation for SUBREGs

[Bug other/52278] New: [avr] inefficient register allocation for SUBREGs

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

             Bug #: 52278
           Summary: [avr] inefficient register allocation for SUBREGs
    Classification: Unclassified
           Product: gcc
           Version: 4.7.0
            Status: UNCONFIRMED
          Keywords: missed-optimization, ra
          Severity: normal
          Priority: P3
         Component: other
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: gjl@gcc.gnu.org
            Target: avr


Suppose the following small function compiled for AVR.
Remember AVR is 8-bit machine with int = HImode and UNITS_PER_WORD = 1.

int add (int val)
{
    return val + 1;
}

The addition can be performed in one insn; val and return value are passed in
HI:24 as you can see in .ira dump:


(insn 6 3 19 2 (parallel [
            (set (reg:HI 45)
                (plus:HI (reg:HI 24 r24 [ val ])
                    (const_int 1 [0x1])))
            (clobber (scratch:QI))
        ]) add.c:3 42 {addhi3_clobber}
     (expr_list:REG_DEAD (reg:HI 24 r24 [ val ])
        (nil)))

(insn 19 6 20 2 (set (reg:QI 24 r24)
        (subreg:QI (reg:HI 45) 0)) add.c:4 18 {movqi_insn}
     (nil))

(insn 20 19 14 2 (set (reg:QI 25 r25 [+1 ])
        (subreg:QI (reg:HI 45) 1)) add.c:4 18 {movqi_insn}
     (expr_list:REG_DEAD (reg:HI 45)
        (nil)))

(insn 14 20 0 2 (use (reg/i:HI 24 r24)) add.c:4 -1
     (nil))

IRA writes:

      Pushing a0(r45,l0)(cost 0)
      Popping a0(r45,l0)  -- assign reg 18
Disposition:
    0:r45  l0    18

i.e. it assigns pseudo HI:45 to hard register HI:18 and thus causes inefficient
code because it happily moves values around without need.

.reload generates additional move insns to satisfy the constraints of addhi3
which are basically "=r, %0, rn" i.e. addition is a 2-operand insn where op0
and op1 must be in the same hard register:

(insn 23 3 6 2 (set (reg:HI 18 r18 [45])
        (reg:HI 24 r24 [ val ])) add.c:3 22 {*movhi}
     (nil))

(insn 6 23 19 2 (parallel [
            (set (reg:HI 18 r18 [45])
                (plus:HI (reg:HI 18 r18 [45])
                    (const_int 1 [0x1])))
            (clobber (scratch:QI))
        ]) add.c:3 42 {addhi3_clobber}
     (nil))

(insn 19 6 20 2 (set (reg:QI 24 r24)
        (reg:QI 18 r18 [45])) add.c:4 18 {movqi_insn}
     (nil))

(insn 20 19 14 2 (set (reg:QI 25 r25 [+1 ])
        (reg:QI 19 r19 [+1 ])) add.c:4 18 {movqi_insn}
     (nil))


However, the machine could just as well do the addition in HI:24 directly like
so:

(parallel [(set (reg:HI 24 r24)
                (plus:HI (reg:HI 24)
                         (const_int 1)))
           (clobber (scratch:QI))])  {addhi3_clobber}

The code above is just a small example to show the problem, but the issue also
occurs with more complex code and not only for return and parameter registers.

== Command line ==

avr-gcc add.c -c -mmcu=avr4 -Os -save-temps -dp -da

== configure ==

../../gcc.gnu.org/trunk/configure --target=avr
--prefix=/local/gnu/install/gcc-4.7 --disable-nls --enable-languages=c,c++
--with-dwarf2 --enable-checking=yes,rtl

Thread model: single
gcc version 4.7.0 20120206 (experimental) (GCC)

[Bug other/52278] [avr] inefficient register allocation for SUBREGs

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

--- Comment #1 from Georg-Johann Lay <gjl at gcc dot gnu.org> 2012-02-16 14:00:59 UTC ---
Created attachment 26677
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=26677
add.c

[Bug other/52278] [avr] inefficient register allocation for SUBREGs

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

--- Comment #4 from Georg-Johann Lay <gjl at gcc dot gnu.org> 2012-02-16 14:06:43 UTC ---
Created attachment 26680
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=26680
add.c.198r.reload

[Bug other/52278] [avr] inefficient register allocation for SUBREGs

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

--- Comment #3 from Georg-Johann Lay <gjl at gcc dot gnu.org> 2012-02-16 14:04:02 UTC ---
Created attachment 26679
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=26679
add.c.197r.ira

[Bug other/52278] [avr] inefficient register allocation for SUBREGs

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

--- Comment #2 from Georg-Johann Lay <gjl at gcc dot gnu.org> 2012-02-16 14:03:05 UTC ---
Created attachment 26678
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=26678
add.s

Assembler output with -c -mmcu=avr4 -Os -save-temps -dp -da

To see reasonable code, add -fno-split-wide-types

[Bug other/52278] [avr] inefficient register allocation for SUBREGs

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

Georg-Johann Lay <gjl at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2012-02-28
                 CC|                            |eric.weddington at atmel
                   |                            |dot com
     Ever Confirmed|0                           |1

[Bug other/52278] [avr] inefficient register allocation for SUBREGs

[wvangulik at xs4all dot nl]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

Wouter van Gulik <wvangulik at xs4all dot nl> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |wvangulik at xs4all dot nl

--- Comment #5 from Wouter van Gulik <wvangulik at xs4all dot nl> 2012-07-27 17:23:59 UTC ---
Note that the same behavior is seen for pointers and long.

long add(long l)
{
    return l + 1;
}

and

char* add(char* p)
{
    return p + 1;
}

[Bug other/52278] [avr] inefficient register allocation for SUBREGs

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

Georg-Johann Lay <gjl at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |Kip.Hicit at gmail dot com

--- Comment #6 from Georg-Johann Lay <gjl at gcc dot gnu.org> 2012-10-21 20:54:12 UTC ---
*** Bug 47644 has been marked as a duplicate of this bug. ***

[Bug other/52278] [4.7/4.8 Regression] [avr] inefficient register allocation for SUBREGs

[rguenth at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P4
   Target Milestone|---                         |4.7.3
            Summary|[4.3 4.4 4.5 4.7 4.8        |[4.7/4.8 Regression] [avr]
                   |Regression] [avr]           |inefficient register
                   |inefficient register        |allocation for SUBREGs
                   |allocation for SUBREGs      |

[Bug other/52278] [4.7/4.8/4.9 Regression] [avr] inefficient register allocation for SUBREGs

[rguenth at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.7.3                       |4.7.4

--- Comment #7 from Richard Biener <rguenth at gcc dot gnu.org> 2013-04-11 07:58:44 UTC ---
GCC 4.7.3 is being released, adjusting target milestone.

[Bug other/52278] [4.7/4.8/4.9/4.10 Regression] [avr] inefficient register allocation for SUBREGs

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.7.4                       |4.8.4

--- Comment #8 from Richard Biener <rguenth at gcc dot gnu.org> ---
The 4.7 branch is being closed, moving target milestone to 4.8.4.

[Bug other/52278] [4.8/4.9/5 Regression] [avr] inefficient register allocation for SUBREGs

[gjl at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52278

Georg-Johann Lay <gjl at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
      Known to work|                            |4.8.0, 4.9.2
         Resolution|---                         |WORKSFORME
      Known to fail|4.8.0                       |

--- Comment #9 from Georg-Johann Lay <gjl at gcc dot gnu.org> ---
Works for me in 4.8 and 4.9.