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From: "amker.cheng at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/52412] another unnecessary register move on arm
Date: Tue, 31 Jul 2012 14:13:00 -0000 [thread overview]
Message-ID: <bug-52412-4-WcZJOz1H6q@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-52412-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52412
amker.cheng <amker.cheng at gmail dot com> changed:
What |Removed |Added
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CC| |amker.cheng at gmail dot
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--- Comment #2 from amker.cheng <amker.cheng at gmail dot com> 2012-07-31 14:12:54 UTC ---
The register move insn is generated by cse2 pass, and after that, there is no
cprop pass till ira.
The two allocnos for r6/r3(the original pseudos) are conflict with each other,
though they contains same value and connected by move insn, IRA cannot allocate
same hard register for them.
Moveover, the case is compile with Os, where gcc does IRA in whole single
region, and live range cannot be split either.
next prev parent reply other threads:[~2012-07-31 14:13 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-02-28 9:01 [Bug target/52412] New: " carrot at google dot com
2012-02-29 11:44 ` [Bug target/52412] " ramana at gcc dot gnu.org
2012-07-31 14:13 ` amker.cheng at gmail dot com [this message]
2014-07-09 8:42 ` ktkachov at gcc dot gnu.org
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