From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugs-return-384718-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org>
Received: (qmail 17494 invoked by alias); 28 Feb 2012 08:56:08 -0000
Received: (qmail 17486 invoked by uid 22791); 28 Feb 2012 08:56:07 -0000
X-SWARE-Spam-Status: No, hits=-2.8 required=5.0	tests=ALL_TRUSTED,AWL,BAYES_00
X-Spam-Check-By: sourceware.org
Received: from localhost (HELO gcc.gnu.org) (127.0.0.1)    by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 28 Feb 2012 08:55:51 +0000
From: "carrot at google dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/52412] New: another unnecessary register move on arm
Date: Tue, 28 Feb 2012 09:01:00 -0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: new
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: target
X-Bugzilla-Keywords:
X-Bugzilla-Severity: normal
X-Bugzilla-Who: carrot at google dot com
X-Bugzilla-Status: UNCONFIRMED
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: ---
X-Bugzilla-Changed-Fields:
Message-ID: <bug-52412-4@http.gcc.gnu.org/bugzilla/>
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
Content-Type: text/plain; charset="UTF-8"
MIME-Version: 1.0
Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm
Precedence: bulk
List-Id: <gcc-bugs.gcc.gnu.org>
List-Archive: <http://gcc.gnu.org/ml/gcc-bugs/>
List-Post: <mailto:gcc-bugs@gcc.gnu.org>
List-Help: <mailto:gcc-bugs-help@gcc.gnu.org>
Sender: gcc-bugs-owner@gcc.gnu.org
X-SW-Source: 2012-02/txt/msg02652.txt.bz2

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52412

             Bug #: 52412
           Summary: another unnecessary register move on arm
    Classification: Unclassified
           Product: gcc
           Version: 4.7.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: carrot@google.com
            Target: arm-linux-gnueabi


Compile following code with options -march=armv7-a -mthumb -Os

extern int Table[256];
typedef struct {
      char* f0;
      int f1;
      int f2;
      char f3[256];
      int f4;
   } S;

void t0m(S* s)
{
   int i;
   char ch = (char)(s->f1);
   for (i = 0; i < 10 ; i++)
      s->f4 =  Table[s->f4 ^ ch];
   s->f3[s->f1] = 1;
   switch (s->f2) {
      case 1:
         *s->f0 = ch;
         break;
      case 2:
         *s->f0 = ch;
         break;
   }
}

ARM gcc 4.7 generates:


t0m:
    ldr    r1, [r0, #4]
    movs    r2, #10
    push    {r4, r5, r6, lr}
    uxtb    r3, r1
    ldr    r5, .L7
    mov    r6, r3                // A
.L2:
    ldr    r4, [r0, #268]
    subs    r2, r2, #1
    eor    r4, r6, r4
    ldr    r4, [r5, r4, lsl #2]
    str    r4, [r0, #268]
    bne    .L2
    adds    r1, r0, r1
    movs    r2, #1
    strb    r2, [r1, #12]
    ldr    r2, [r0, #8]
    cmp    r2, #1
    beq    .L5
    cmp    r2, #2
    bne    .L1
.L5:
    ldr    r2, [r0, #0]
    strb    r3, [r2, #0]
.L1:
    pop    {r4, r5, r6, pc}
.L8:
    .align    2
.L7:
    .word    Table

Instruction A moves register r3 to r6, but both r3 and r6 are read only in
following code, so any one is enough for following usage.

Compile it to arm mode instructions has the same problem.