From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12855 invoked by alias); 6 Mar 2012 11:26:13 -0000 Received: (qmail 12822 invoked by uid 22791); 6 Mar 2012 11:26:12 -0000 X-SWARE-Spam-Status: No, hits=-2.8 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 06 Mar 2012 11:25:59 +0000 From: "gjl at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/52505] New: [avr]: __memx address space reading unintentionally from RAM Date: Tue, 06 Mar 2012 11:26:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: gjl at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2012-03/txt/msg00511.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52505 Bug #: 52505 Summary: [avr]: __memx address space reading unintentionally from RAM Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Keywords: wrong-code Severity: normal Priority: P3 Component: target AssignedTo: unassigned@gcc.gnu.org ReportedBy: gjl@gcc.gnu.org Target: avr The __memx address space reader must determine at runtime from what memory area to read and what instruction to use. To read one byte, ine sequence might look like: ld r24,Z sbrs r25,7 lpm r24,Z This is not correct because if the read is fram flash memory but the address taken as RAM address points to the I/O area, the read might have an effect on I/O register, for example clear a latch or buffer.