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From: "olegendo at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/52628] SH Target: Inefficient shift by T bit result
Date: Sun, 27 Sep 2015 04:29:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52628

--- Comment #2 from Oleg Endo <olegendo at gcc dot gnu.org> ---
To catch cases such as

int test_01 (int a, int b, int c)
{
  return c << (a > b ? 1 : 0);
}

a shift with treg_set_expr can be implemented.  Combine is looking for this
pattern:

Failed to match this instruction:
(set (reg:SI 169)
    (ashift:SI (reg:SI 6 r6 [ c ])
        (gt:SI (reg:SI 4 r4 [ a ])
            (reg:SI 5 r5 [ b ]))))


However, this will only be tried with dynamic shifts.  If software dynamic
shifts are used the library call is expanded too early and combine does not try
it.  This is done to get constant sharing for the library address.  It'd be
better to have dynamic shifts only throughout combine, expand library calls in
split1 and then do a constant optimization afterwards.

For cases such as

int test_01 (int a, int b, int c)
{
  return c << (a > b ? 3 : 2);
}

with dynamic shifts we currently get:

        cmp/gt  r5,r4
        mov     r6,r0
        movt    r1
        add     #2,r1
        rts
        shld    r1,r0

where the expected code would be:
       cmp/gt   r5,r4
       shll2    r6
       bf       0f
       add      r6,r6
0:
       rts
       mov      r6,r0

or
       cmp/gt   r5,r4
       mov      #1,r2
       mov      r6,r0
       addc     r2,r2
       rts
       shld     r2,r6


It fails to use the addc insn because of PR 65317 and PR 67057.

Then, the actual shift is tried as:

Failed to match this instruction:
(set (reg:SI 168)
    (ashift:SI (reg:SI 6 r6 [ c ])
        (plus:SI (reg:SI 169)
            (const_int 2 [0x2]))))

and as:
Failed to match this instruction:
(set (reg:SI 168)
    (ashift:SI (reg:SI 6 r6 [ c ])
        (plus:SI (gt:SI (reg:SI 4 r4 [ a ])
                (reg:SI 5 r5 [ b ]))
            (const_int 2 [0x2]))))

these need to be implemented to be able to split out the common constant shift
count and the dynamic 0/1 shift count.

For 

int test_02 (int a, int b, int c)
{
  return c << (a > b ? 2 : 0);
}

combine tries:
Failed to match this instruction:
(set (reg:SI 168)
    (ashift:SI (reg:SI 6 r6 [ c ])
        (ashift:SI (gt:SI (reg:SI 4 r4 [ a ])
                (reg:SI 5 r5 [ b ]))
            (const_int 1 [0x1]))))

However, for 

int test_02 (int a, int b, int c)
{
  return c << (a > b ? 3 : 0);
}

it doesn't try anything like that.  This is probably a missed case in ifcvt.