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* [Bug c/53124] New: Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm)
@ 2012-04-25 19:57 ksebov at rim dot com
2012-04-25 20:55 ` [Bug target/53124] " ksebov at rim dot com
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: ksebov at rim dot com @ 2012-04-25 19:57 UTC (permalink / raw)
To: gcc-bugs
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53124
Bug #: 53124
Summary: Arm NEON narrowing right shift instructions impose
incorrect operand bounds (intrinsic and asm)
Classification: Unclassified
Product: gcc
Version: 4.4.2
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
AssignedTo: unassigned@gcc.gnu.org
ReportedBy: ksebov@rim.com
The following code produces "Constant out of range" compiler error, even though
it's supposed to allow any immediate up to (size(datatype) - 1), or 31 in this
case. See
http://infocenter.arm.com/help/topic/com.arm.doc.dui0489c/CIHGJIHA.html
Using inline assembly implementation doesn't work either resulting in "Error:
immediate out of range for narrowing operation".
int16x4_t rshift8_and_saturate_uint12( int32x4_t arg )
{
uint32x4_t saturated_at32 = vqshluq_n_s32( arg, 32-(8+12) );
#if 1
return vshrn_n_s32( vreinterpretq_s32_u32( saturated_at32 ), 32-12 );
#else
int16x4_t result;
asm volatile( "VSHRN.I32 %P0, %q1, #20" : "=w"(result) :
"w"(saturated_at32));
return result;
#endif
}
It appears similar to http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41196
although in this case the ssembler code will probably need to be fixed as well.
Also, by looking at /gcc/config/arm/neon.md it seems all V[Q]SHR[U]N are
affected.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/53124] Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm)
2012-04-25 19:57 [Bug c/53124] New: Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm) ksebov at rim dot com
@ 2012-04-25 20:55 ` ksebov at rim dot com
2012-04-26 14:22 ` rearnsha at gcc dot gnu.org
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: ksebov at rim dot com @ 2012-04-25 20:55 UTC (permalink / raw)
To: gcc-bugs
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53124
--- Comment #1 from Kostya Sebov <ksebov at rim dot com> 2012-04-25 20:54:50 UTC ---
Note: 0 also not allowed even though it should be according to the docs.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/53124] Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm)
2012-04-25 19:57 [Bug c/53124] New: Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm) ksebov at rim dot com
2012-04-25 20:55 ` [Bug target/53124] " ksebov at rim dot com
@ 2012-04-26 14:22 ` rearnsha at gcc dot gnu.org
2012-04-26 14:29 ` ksebov at rim dot com
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: rearnsha at gcc dot gnu.org @ 2012-04-26 14:22 UTC (permalink / raw)
To: gcc-bugs
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53124
Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Resolution| |INVALID
--- Comment #2 from Richard Earnshaw <rearnsha at gcc dot gnu.org> 2012-04-26 14:21:36 UTC ---
The compiler and assembler are correct. The instruction is:
VSHRN.I<size> Dd, Qm, #imm
and the immediate, imm, must be in the range 1..size/2
So for vshrn.i32 imm must be in the range 1..16
Please also note that gcc-4.4 is now very old and no-longer being maintained, I
strongly suggest you upgrade to a more recent set of tools.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/53124] Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm)
2012-04-25 19:57 [Bug c/53124] New: Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm) ksebov at rim dot com
2012-04-25 20:55 ` [Bug target/53124] " ksebov at rim dot com
2012-04-26 14:22 ` rearnsha at gcc dot gnu.org
@ 2012-04-26 14:29 ` ksebov at rim dot com
2012-04-26 16:48 ` rearnsha at gcc dot gnu.org
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: ksebov at rim dot com @ 2012-04-26 14:29 UTC (permalink / raw)
To: gcc-bugs
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53124
Kostya Sebov <ksebov at rim dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|RESOLVED |UNCONFIRMED
Resolution|INVALID |
--- Comment #3 from Kostya Sebov <ksebov at rim dot com> 2012-04-26 14:29:12 UTC ---
(In reply to comment #2)
> The compiler and assembler are correct. The instruction is:
>
> VSHRN.I<size> Dd, Qm, #imm
>
> and the immediate, imm, must be in the range 1..size/2
>
> So for vshrn.i32 imm must be in the range 1..16
>
I apologize if I miss something but,as far as I can see, the ARM docs clearly
say the imm should be in 0..size-1 range (see the link to the above). This is
the nature of the bug.
> Please also note that gcc-4.4 is now very old and no-longer being maintained, I
> strongly suggest you upgrade to a more recent set of tools.
>
I've checked the trunk source and the incorrect range is still there.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/53124] Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm)
2012-04-25 19:57 [Bug c/53124] New: Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm) ksebov at rim dot com
` (3 preceding siblings ...)
2012-04-26 16:48 ` rearnsha at gcc dot gnu.org
@ 2012-04-26 16:48 ` rearnsha at gcc dot gnu.org
2012-04-27 12:25 ` rearnsha at gcc dot gnu.org
5 siblings, 0 replies; 7+ messages in thread
From: rearnsha at gcc dot gnu.org @ 2012-04-26 16:48 UTC (permalink / raw)
To: gcc-bugs
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53124
Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Resolution| |FIXED
--- Comment #4 from Richard Earnshaw <rearnsha at gcc dot gnu.org> 2012-04-26 16:47:38 UTC ---
(In reply to comment #3)
> (In reply to comment #2)
> > The compiler and assembler are correct. The instruction is:
> >
> > VSHRN.I<size> Dd, Qm, #imm
> >
> > and the immediate, imm, must be in the range 1..size/2
> >
> > So for vshrn.i32 imm must be in the range 1..16
> >
> I apologize if I miss something but,as far as I can see, the ARM docs clearly
> say the imm should be in 0..size-1 range (see the link to the above). This is
> the nature of the bug.
>
What ARM docs? The ARM ARM (which is the doc that counts) is as I've stated.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/53124] Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm)
2012-04-25 19:57 [Bug c/53124] New: Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm) ksebov at rim dot com
` (2 preceding siblings ...)
2012-04-26 14:29 ` ksebov at rim dot com
@ 2012-04-26 16:48 ` rearnsha at gcc dot gnu.org
2012-04-26 16:48 ` rearnsha at gcc dot gnu.org
2012-04-27 12:25 ` rearnsha at gcc dot gnu.org
5 siblings, 0 replies; 7+ messages in thread
From: rearnsha at gcc dot gnu.org @ 2012-04-26 16:48 UTC (permalink / raw)
To: gcc-bugs
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53124
Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|FIXED |INVALID
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Bug target/53124] Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm)
2012-04-25 19:57 [Bug c/53124] New: Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm) ksebov at rim dot com
` (4 preceding siblings ...)
2012-04-26 16:48 ` rearnsha at gcc dot gnu.org
@ 2012-04-27 12:25 ` rearnsha at gcc dot gnu.org
5 siblings, 0 replies; 7+ messages in thread
From: rearnsha at gcc dot gnu.org @ 2012-04-27 12:25 UTC (permalink / raw)
To: gcc-bugs
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53124
--- Comment #5 from Richard Earnshaw <rearnsha at gcc dot gnu.org> 2012-04-27 12:25:06 UTC ---
Just for the record, I've confirmed with the Assembler Guide team that there is
a documentation fault in that document. It will be clarified in a future
release.
^ permalink raw reply [flat|nested] 7+ messages in thread
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2012-04-25 19:57 [Bug c/53124] New: Arm NEON narrowing right shift instructions impose incorrect operand bounds (intrinsic and asm) ksebov at rim dot com
2012-04-25 20:55 ` [Bug target/53124] " ksebov at rim dot com
2012-04-26 14:22 ` rearnsha at gcc dot gnu.org
2012-04-26 14:29 ` ksebov at rim dot com
2012-04-26 16:48 ` rearnsha at gcc dot gnu.org
2012-04-26 16:48 ` rearnsha at gcc dot gnu.org
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