From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 6120 invoked by alias); 22 May 2012 10:01:20 -0000 Received: (qmail 6098 invoked by uid 22791); 22 May 2012 10:01:17 -0000 X-SWARE-Spam-Status: No, hits=-4.3 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00,KHOP_THREADED X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 22 May 2012 10:01:04 +0000 From: "steven at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/53447] missed optimization of 64bit ALU operation with small constant Date: Tue, 22 May 2012 10:01:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: steven at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: CC Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2012-05/txt/msg02145.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53447 Steven Bosscher changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |steven at gcc dot gnu.org --- Comment #1 from Steven Bosscher 2012-05-22 08:24:52 UTC --- Confirmed. Here is the assembler output with the "-dAp -fdump-rtl-all-details" options: t0p: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. @ BLOCK 2 freq:10000 seq:0 @ PRED: ENTRY [100.0%] (fallthru) ldrd r2, [r0] @ 6 *arm_movdi/4 [length = 8] push {r4, r5} @ 20 *push_multi [length = 2] movs r4, #1 @ 16 *thumb2_movsi_shortim [length = 2] adds r2, r2, r4 @ 18 *addsi3_compare_op1/1 [length = 4] mov r5, #0 @ 17 *thumb2_movsi_insn/2 [length = 4] adc r3, r3, r5 @ 19 *addsi3_carryin_ltu [length = 4] strd r2, [r0] @ 9 *arm_movdi/5 [length = 8] @ SUCC: EXIT [100.0%] pop {r4, r5} bx lr The add is a DImode add up to the pr53447.c.195r.postreload dump: (insn 6 3 13 2 (set (reg:DI 2 r2 [orig:137 D.4118 ] [137]) (mem:DI (reg/v/f:SI 0 r0 [orig:136 p ] [136]) [2 *p_1(D)+0 S8 A64])) pr53447.c:3 182 {*arm_movdi} (nil)) (insn 13 6 8 2 (set (reg:DI 4 r4 [139]) (const_int 1 [0x1])) pr53447.c:3 182 {*arm_movdi} (expr_list:REG_EQUIV (const_int 1 [0x1]) (nil))) (insn 8 13 9 2 (parallel [ (set (reg:DI 2 r2 [orig:137 D.4118 ] [137]) (plus:DI (reg:DI 2 r2 [orig:137 D.4118 ] [137]) (reg:DI 4 r4 [139]))) (clobber (reg:CC 24 cc)) ]) pr53447.c:3 1 {*arm_adddi3} (nil)) (insn 9 8 12 2 (set (mem:DI (reg/v/f:SI 0 r0 [orig:136 p ] [136]) [2 *p_1(D)+0 S8 A64]) (reg:DI 2 r2 [orig:137 D.4118 ] [137])) pr53447.c:3 182 {*arm_movdi} (nil)) The add is split in the pr53447.c.197r.split2 dump: (insn 6 3 16 2 (set (reg:DI 2 r2 [orig:137 D.4118 ] [137]) (mem:DI (reg/v/f:SI 0 r0 [orig:136 p ] [136]) [2 *p_1(D)+0 S8 A64])) pr53447.c:3 182 {*arm_movdi} (nil)) (insn 16 6 17 2 (set (reg:SI 4 r4 [139]) (const_int 1 [0x1])) pr53447.c:3 718 {*thumb2_movsi_insn} (nil)) (insn 17 16 18 2 (set (reg:SI 5 r5 [+4 ]) (const_int 0 [0])) pr53447.c:3 718 {*thumb2_movsi_insn} (nil)) (insn 18 17 19 2 (parallel [ (set (reg:CC_C 24 cc) (compare:CC_C (plus:SI (reg:SI 2 r2 [orig:137 D.4118 ] [137]) (reg:SI 4 r4 [139])) (reg:SI 2 r2 [orig:137 D.4118 ] [137]))) (set (reg:SI 2 r2 [orig:137 D.4118 ] [137]) (plus:SI (reg:SI 2 r2 [orig:137 D.4118 ] [137]) (reg:SI 4 r4 [139]))) ]) pr53447.c:3 10 {*addsi3_compare_op1} (nil)) (insn 19 18 9 2 (set (reg:SI 3 r3 [ D.4118+4 ]) (plus:SI (plus:SI (reg:SI 3 r3 [ D.4118+4 ]) (reg:SI 5 r5 [+4 ])) (ltu:SI (reg:CC_C 24 cc) (const_int 0 [0])))) pr53447.c:3 14 {*addsi3_carryin_ltu} (nil)) (insn 9 19 12 2 (set (mem:DI (reg/v/f:SI 0 r0 [orig:136 p ] [136]) [2 *p_1(D)+0 S8 A64]) (reg:DI 2 r2 [orig:137 D.4118 ] [137])) pr53447.c:3 182 {*arm_movdi} (nil))