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From: "olegendo at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/53513] [SH] Add support for fschg and fpchg insns and improve fenv support
Date: Wed, 15 Oct 2014 17:57:00 -0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53513

Oleg Endo <olegendo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
  Attachment #33721|0                           |1
        is obsolete|                            |

--- Comment #28 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Created attachment 33727
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=33727&action=edit
Using virtual FPSCR registers to model insn dependencies

(In reply to Oleg Endo from comment #27)
> Created attachment 33721 [details]
> Using virtual FPSCR registers to model insn dependencies
> 
> Updated patch that avoids the single_set problems by using (clobber (reg:SI
> FPSCR_STAT_REG)) instead of a set.  This also eliminates the fsca pattern
> changes in the previous patch.  Since the 'fpu_switch' insn is still a
> multiple set insn, it won't be used for delay slot stuffing, but this is a
> minor issue that can be addressed later.  I'm testing the patch now on
> sh-sim.  At least 'make all' works.

Testing for '-m4 -ml' and '-m4 -mb' shows one new failure (ignoring the ISR
failures):

FAIL: gcc.c-torture/execute/pr28982a.c   -O1  (internal compiler error)
FAIL: gcc.c-torture/execute/pr28982a.c   -O1  (test for excess errors)

The problem is the define_split and the peephole2 patterns below the
"fpu_switch" insn.  I don't know how/if that was working before.  I've removed
the peephole2 pattern and rewrote the split pattern, which fixes the failure
above.  I'll re-test the whole thing again.