From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21214 invoked by alias); 28 May 2012 23:57:37 -0000 Received: (qmail 21204 invoked by uid 22791); 28 May 2012 23:57:35 -0000 X-SWARE-Spam-Status: No, hits=-3.5 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 28 May 2012 23:57:13 +0000 From: "olegendo at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/53513] New: SH Target: Add support for fschg and fpchg insns Date: Tue, 29 May 2012 01:51:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: olegendo at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2012-05/txt/msg02686.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53513 Bug #: 53513 Summary: SH Target: Add support for fschg and fpchg insns Classification: Unclassified Product: gcc Version: 4.8.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unassigned@gcc.gnu.org ReportedBy: olegendo@gcc.gnu.org CC: kkojima@gcc.gnu.org Target: sh*-*-* Currently FPU mode switches are done by always loading values from the global __fpscr_values array into FPSCR. On SH4A the fpchg insn should be used to do SFmode / DFmode switches. On non-SH4A it would probably be better to toggle the PR bit by other means in order to preserve the other FPSCR bits. One example use case where the FPSCR.FR bit needs to be preserved is matrix multiplication, where user code could swap the register bank using the frchg insn. Even if the user code updated the global __fpscr_values to reflect the FPSCR.FR change, it would break when there are multiple threads that want to use different FPSCR.FR/PR/SZ settings, as there is only one global __fpscr_values array. To provide some backwards compatibility with existing binaries the global __fpscr_values should be kept around. Old code would then still be able to reference them and new code would not touch them except when __set_fpscr is used. Since the FPSCR.PR/SZ settings at function entry and function exit are defined by the selected ABI there should be no interoperability problems.