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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/53639] x86_64: redundant 64-bit operations on 32-bit integers
Date: Tue, 12 Jun 2012 12:21:00 -0000 [thread overview]
Message-ID: <bug-53639-4-ZdcE3Q4eNM@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-53639-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53639
--- Comment #3 from Uros Bizjak <ubizjak at gmail dot com> 2012-06-12 12:21:07 UTC ---
(In reply to comment #2)
> Unfortunately that patch regressed pr49095.c testcase. So, either we limit the
> splitter to the paradoxical subreg that is created by the combiner when seeing
> SImode and followed by zero_extend to DImode of the result (done in this
> patch), or we'd need to add new peepholes for the a = mem; a &= const; mem = a;
> if (a)
> cases where a &= const has been transformed into andsi_1_zext. Uros, any
> preference?
The splitter, since the scheduler can break interesting sequence by inserting
unrelated instructions.
next prev parent reply other threads:[~2012-06-12 12:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-11 22:49 [Bug target/53639] New: " mikpe at it dot uu.se
2012-06-12 7:40 ` [Bug target/53639] " jakub at gcc dot gnu.org
2012-06-12 10:41 ` jakub at gcc dot gnu.org
2012-06-12 12:21 ` ubizjak at gmail dot com [this message]
2012-06-14 18:27 ` jakub at gcc dot gnu.org
2024-03-28 6:25 ` pinskia at gcc dot gnu.org
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