From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 18801 invoked by alias); 18 Sep 2012 12:42:00 -0000 Received: (qmail 18793 invoked by uid 22791); 18 Sep 2012 12:41:59 -0000 X-SWARE-Spam-Status: No, hits=-4.3 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00,KHOP_THREADED,TW_SR X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 18 Sep 2012 12:41:46 +0000 From: "jan.smets@alcatel-lucent.com" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/54524] Spurious add on sum of bitshifts (forward-propagate issue) Date: Tue, 18 Sep 2012 12:42:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: major X-Bugzilla-Who: jan.smets@alcatel-lucent.com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Target Known to work Known to fail Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2012-09/txt/msg01340.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54524 Jan Smets changed: What |Removed |Added ---------------------------------------------------------------------------- Target|mips |mipsisa64-octeon-elf Known to work| |4.5.0, 4.5.4 Known to fail| |4.6.0, 4.6.3, 4.7.1, 4.8.0 --- Comment #2 from Jan Smets 2012-09-18 12:41:43 UTC --- GCC 4.5.4 => CORRECT ==================== 0: 27bdffd0 addiu sp,sp,-48 4: 97a5001c lhu a1,28(sp) 8: 000427c0 sll a0,a0,0x1f c: 00053600 sll a2,a1,0x18 10: 3c030040 lui v1,0x40 14: 00052a02 srl a1,a1,0x8 18: 00a42821 addu a1,a1,a0 1c: 00c33821 addu a3,a2,v1 20: 3c024000 lui v0,0x4000 24: 00e6302b sltu a2,a3,a2 28: 00a21021 addu v0,a1,v0 2c: 3c040000 lui a0,0x0 2c: R_MIPS_HI16 .rodata 30: 24840000 addiu a0,a0,0 30: R_MIPS_LO16 .rodata 34: afbf002c sw ra,44(sp) 38: 0c000000 jal 0 38: R_MIPS_26 printf 3c: 00c23021 addu a2,a2,v0 <= ! 40: 8fbf002c lw ra,44(sp) 44: 03e00008 jr ra 48: 27bd0030 addiu sp,sp,48 GCC 4.6.3 ========= 0: 27bdffd0 addiu sp,sp,-48 4: 97a5001c lhu a1,28(sp) 8: 3c030040 lui v1,0x40 c: 3c024000 lui v0,0x4000 10: 00054600 sll t0,a1,0x18 14: 01033821 addu a3,t0,v1 18: 00052a02 srl a1,a1,0x8 1c: 00e8402b sltu t0,a3,t0 20: 00a21021 addu v0,a1,v0 24: 000427c0 sll a0,a0,0x1f 28: 01023021 addu a2,t0,v0 2c: 00c43021 addu a2,a2,a0 30: 3c040000 lui a0,0x0 30: R_MIPS_HI16 .rodata 34: 24840000 addiu a0,a0,0 34: R_MIPS_LO16 .rodata 38: afbf002c sw ra,44(sp) 3c: 0c000000 jal 0 3c: R_MIPS_26 printf 40: 24c60001 addiu a2,a2,1 <= ! 44: 8fbf002c lw ra,44(sp) 48: 03e00008 jr ra 4c: 27bd0030 addiu sp,sp,48 GCC 4.8.0 ========= 0: 27bdffd0 addiu sp,sp,-48 4: 97a6001c lhu a2,28(sp) 8: 3c030040 lui v1,0x40 c: 00062e00 sll a1,a2,0x18 10: 00a33821 addu a3,a1,v1 14: 00063202 srl a2,a2,0x8 18: 3c024000 lui v0,0x4000 1c: 00e5282b sltu a1,a3,a1 20: 00c21021 addu v0,a2,v0 24: 000427c0 sll a0,a0,0x1f 28: 00a21021 addu v0,a1,v0 2c: 00443021 addu a2,v0,a0 30: 3c040000 lui a0,0x0 30: R_MIPS_HI16 .rodata 34: 24840000 addiu a0,a0,0 34: R_MIPS_LO16 .rodata 38: afbf002c sw ra,44(sp) 3c: 0c000000 jal 0 3c: R_MIPS_26 printf 40: 24c60001 addiu a2,a2,1 <= ! 44: 8fbf002c lw ra,44(sp) 48: 03e00008 jr ra 4c: 27bd0030 addiu sp,sp,48