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From: "kkojima at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/54602] [SH] Register pop insn not put in rts delay slot Date: Wed, 10 Oct 2012 22:44:00 -0000 [thread overview] Message-ID: <bug-54602-4-HGNg3GqqJZ@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-54602-4@http.gcc.gnu.org/bugzilla/> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54602 --- Comment #4 from Kazumoto Kojima <kkojima at gcc dot gnu.org> 2012-10-10 22:44:17 UTC --- (In reply to comment #3) > Kaz, could you please also have a pre-look at this? I might be missing > something... Looks reasonable to me, though I also might be missing something. > Also, I've noticed that on SH4 (which has banked regs R0..R7) the banked regs > are also saved / restored in an interrupt function. This actually defeats the > purpose of the R0..R7 register bank. Maybe some historic reason, or just > accident? I don't know the history about it. I can only imagine that some system could assume some banked regs will be not clobbered with their exception handler and will be used like as normal registers. A new -m option which controls the behavior of which default is not to save/restore the banked regs?
next prev parent reply other threads:[~2012-10-10 22:44 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2012-09-16 15:26 [Bug target/54602] New: " olegendo at gcc dot gnu.org 2012-10-09 22:52 ` [Bug target/54602] " olegendo at gcc dot gnu.org 2012-10-09 22:58 ` olegendo at gcc dot gnu.org 2012-10-10 0:44 ` olegendo at gcc dot gnu.org 2012-10-10 22:44 ` kkojima at gcc dot gnu.org [this message] 2012-10-10 23:24 ` olegendo at gcc dot gnu.org 2012-10-11 13:48 ` olegendo at gcc dot gnu.org 2012-10-12 23:23 ` olegendo at gcc dot gnu.org 2012-10-30 1:26 ` olegendo at gcc dot gnu.org
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