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From: "olegendo at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/55302] New: [SH] Add support for logical ops with GBR mems Date: Tue, 13 Nov 2012 00:18:00 -0000 [thread overview] Message-ID: <bug-55302-4@http.gcc.gnu.org/bugzilla/> (raw) http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55302 Bug #: 55302 Summary: [SH] Add support for logical ops with GBR mems Classification: Unclassified Product: gcc Version: 4.8.0 Status: UNCONFIRMED Severity: enhancement Priority: P3 Component: target AssignedTo: unassigned@gcc.gnu.org ReportedBy: olegendo@gcc.gnu.org Target: sh*-*-* Since now GCC supports GBR based mem refs through the __builtin_thread_pointer function (PR 54760), support for logical operations on QImode GBR mem refs could be added. The insns in question are: and.b #imm,@(r0,gbr) or.b #imm,@(r0,gbr) tst.b #imm,@(r0,gbr) xor.b #imm,@(r0,gbr) Although the insns are slower than using separate loads/stores and operation insn sequences, the resulting code can be potentially more compact. It might be beneficial to enable these insns when optimizing for size.
next reply other threads:[~2012-11-13 0:18 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2012-11-13 0:18 olegendo at gcc dot gnu.org [this message] 2015-02-08 11:44 ` [Bug target/55302] " olegendo at gcc dot gnu.org
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