[Bug target/55372] New: MIPS: Loading integer constants to floating-pointer registers generates suboptimal code

["stevenbaker94 at rocketmail dot com" <gcc-bugzilla@gcc.gnu.org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55372

             Bug #: 55372
           Summary: MIPS: Loading integer constants to floating-pointer
                    registers generates suboptimal code
    Classification: Unclassified
           Product: gcc
           Version: 4.7.2
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: stevenbaker94@rocketmail.com


When loading an integer constant (e.g. 100) into a floating-point variable, the
compiler unconditionally creates a .rodata entry. However, integer constants
that are to be used in floating-point registers always have the lower 16 bits
set to 0, so it is better to use the combination lui+mtc1 rather than lui+lwc1
and a .data entry. (In other words, we save both a word of memory in .data and
one memory fetch for this word.)

As a workaround, I provide a function f() that "converts" a const float into
float using the right instruction sequence (beware that it silently discards
any fractional bits, however):

extern void foo(float x);

static inline float f(const float f)
{
        union {
                float f;
                unsigned int i;
        } x;

        x.f = f;

        unsigned int r;
        float f_out;
        asm ("lui %0, %1"
                : "=d" (r)
                : "I" (x.i >> 16));
        asm ("mtc1 %1, %0"
                : "=f" (f_out)
                : "d" (r));
        return f_out;
}

void bar()
{
#if 1 /* Workaround */
        foo(f(100.0f));
#else /* Native GCC */
        foo(100.0f);
#endif
}

The difference:

ORIGINAL:

Contents of section .rodata.cst4:
 0000 42c80000                             B...            

00000000 <bar>:
   0:   3c020000        lui     v0,0x0
   4:   08000000        j       0 <bar>
   8:   c44c0000        lwc1    $f12,0(v0)

WORKAROUND/PROPOSED IMPROVEMENT:

00000000 <bar>:
   0:   3c0242c8        lui     v0,0x42c8
   4:   08000000        j       0 <bar>
   8:   44826000        mtc1    v0,$f12