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From: "mtkilpailut at torni dot org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/55583] New: Extended shift instruction on x86-64 is not used, producing unoptimal code
Date: Tue, 04 Dec 2012 00:06:00 -0000	[thread overview]
Message-ID: <bug-55583-4@http.gcc.gnu.org/bugzilla/> (raw)


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55583

             Bug #: 55583
           Summary: Extended shift instruction on x86-64 is not used,
                    producing unoptimal code
    Classification: Unclassified
           Product: gcc
           Version: 4.8.0
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: rtl-optimization
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: mtkilpailut@torni.org


Created attachment 28866
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=28866
Source code demonstrating bad code generation

On x86-64, extended shift instruction is not generated for some reason.
Combined with other problems this creates very bad code.

Test functions included for signed and unsigned 16,32,64-bit types for both
left and right shifts and for constant n and function parameter n.

Code of this form:
  unsigned int a, b; const int n = 2;
  void test32l (void) { b = (b << n) | (a >> (32 - n)); }

expected code:
  mov     a(%rip),%eax
  shld    $0x2,%eax,b(%rip)
  ret

produced code:
  mov    b(%rip), %edx   ; Size of register used here depends on gcc version
  mov    a(%rip), %eax   ; Size of register used here depends on gcc version
  sal    $2, %edx        ; Size of register used here depends on gcc version
  shr    $25, %eax
  or     %edx, %eax
  mov    %eax, b(%rip)
  ret


Tested with:
COLLECT_GCC_OPTIONS='-v' '-c' '-save-temps' '-O2' '-Wall' '-W' '-o'
'gcc_shld_not_used' '-mtune=generic'

I tried gcc versions:
GNU C (Debian 4.7.2-4) version 4.7.2 (x86_64-linux-gnu)
GNU C (Debian 4.6.3-11) version 4.6.3 (x86_64-linux-gnu)
GNU C (Debian 4.5.3-9) version 4.5.3 (x86_64-linux-gnu)
GNU C (Debian 4.4.7-2) version 4.4.7 (x86_64-linux-gnu)
GNU C (GCC) version 4.8.0 20121203 (experimental) [trunk revision 194106]
(x86_64-unknown-linux-gnu)

All produce the same code modulo register size differences mentioned above. gcc
HEAD changes sal to leal (,%rcx,4),%eax


             reply	other threads:[~2012-12-04  0:06 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-12-04  0:06 mtkilpailut at torni dot org [this message]
2012-12-04  0:08 ` [Bug rtl-optimization/55583] " mtkilpailut at torni dot org
2012-12-04  0:21 ` hjl.tools at gmail dot com
2012-12-04  1:04 ` mikko.markus.torni at iki dot fi
2012-12-04 10:16 ` [Bug target/55583] " glisse at gcc dot gnu.org
2013-04-01 13:45 ` glisse at gcc dot gnu.org
2014-06-07  9:12 ` glisse at gcc dot gnu.org
2022-05-30  2:23 ` crazylht at gmail dot com
2022-11-01  3:24 ` cvs-commit at gcc dot gnu.org

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