[Bug rtl-optimization/55757] Suboptimal interrupt prologue/epilogue for ARMv7-M (Cortex-M3)

["rearnsha at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55757

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P5
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2012-12-20
     Ever Confirmed|0                           |1
           Severity|normal                      |enhancement

--- Comment #2 from Richard Earnshaw <rearnsha at gcc dot gnu.org> 2012-12-20 16:52:05 UTC ---
The code is there to re-align the stack to 64-bit alignment as required by the
ABI (early versions of the M3 did not have the ability to do this in HW).  The
reason two registers are pushed, rather than one is that this is also needed to
keep the stack aligned and pushing two registers uses less code than adjusting
the stack in a separate insn.

Of course, in this trivial case, the stack realignment isn't necessary as the
compiler should be able to tell that nothing requires re-alignment of the
stack.  But it's a corner case and it's much more common for this to be needed.

If you really know that you don't need stack-alignment on an M3, then just
remove the interrupt attribute.  It really doesn't serve any other purpose on
M-profile cores other than to cause the stack realignment.

Marking as an enhancement.  The code generated today is correct, but
sub-optimal.