[Bug middle-end/55889] [4.8 Regression] ICE: in move_op_ascend, at sel-sched.c:6153 with -fschedule-insns -fselective-scheduling

["dje at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55889

--- Comment #24 from David Edelsohn <dje at gcc dot gnu.org> 2013-01-24 16:37:23 UTC ---
It does not matter if the scheduler knows that insns 17, 20, 26 and 29 really
are calls. The clobbers express everything important.

insn 15 produces r3.
insn 16 produces r4.
insn 17 consumes r3, r4 and produces r3 and clobbers r4.
insn 20 consumes r3.
insn 23 produces r148.
insn 24 produces r3.
insn 25 consumes r148 and produces r4.
insn 26 consumes r3, r4 and produces r3 and clobber r4.
insn 29 consumes r3.

And, yes, insn 23 can be moved before insn 17. It simply requires an
additional, temporary hard register not clobbered by insn 17 that will be
copied to r4 in insn 25.

But I am pointing out that one can track that insn 26 depends on insn 25 and
insn 25 depends on insn 23 through the dataflow graph.

Again, nothing says that insn 23 cannot be hoisted above insn 17. The only
instructions that clobber r65 (LR) are insns 17 and 26.

I do not understand your comments or what information you think is missing or
what is causing the ICE. It seems more that there is something wrong with the
assert causing the ICE and/or some data structure not set / updated correctly
in sel-sched.