From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12898 invoked by alias); 7 Mar 2013 13:32:56 -0000 Received: (qmail 12694 invoked by uid 48); 7 Mar 2013 13:32:31 -0000 From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/56552] conditional move can generate unnecessary conversion code Date: Thu, 07 Mar 2013 13:32:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: middle-end X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: CC Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2013-03/txt/msg00590.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56552 Jakub Jelinek changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |jakub at gcc dot gnu.org --- Comment #2 from Jakub Jelinek 2013-03-07 13:32:30 UTC --- I had to use -O3 -march=loongson2f to trigger it. During combine, it seems the combiner figures everything out, but mips.md lacks needed conditional move patterns: (insn 36 35 37 2 (set (reg:SI 298) (if_then_else:SI (eq:SI (reg:SI 299) (const_int 0 [0])) (reg/v:SI 194 [ a2+-2 ]) (reg/v:SI 213 [ a2+-2 ]))) 602 {*movsi_on_si} (expr_list:REG_DEAD (reg:SI 299) (expr_list:REG_DEAD (reg/v:SI 213 [ a2+-2 ]) (expr_list:REG_DEAD (reg/v:SI 194 [ a2+-2 ]) (nil))))) (insn 37 36 40 2 (set (reg/v:SI 214 [ a2+-2 ]) (zero_extend:SI (subreg:HI (reg:SI 298) 2))) 188 {*zero_extendhisi2} (expr_list:REG_DEAD (reg:SI 298) (nil))) and combiner has: Trying 36 -> 37: Failed to match this instruction: (set (reg/v:SI 214 [ a2+-2 ]) (if_then_else:SI (reg:SI 299) (reg/v:SI 213 [ a2+-2 ]) (reg/v:SI 194 [ a2+-2 ]))) I.e. it figures that the masking isn't needed, but during simplification/canonicalization transforms that (ne:SI (reg:SI 299) (const_int 0)) in first argument of IF_THEN_ELSE into (reg:SI 299). If mips.md had patterns that accepted for movcc the first argument of IF_THEN_ELSE being a register_operand of GPR mode as if it was (ne:GPR (that register) (const_int 0)), the testcase would be fixed.