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From: "olegendo at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/56592] [SH] Add vector ABI
Date: Sun, 17 Mar 2013 14:20:00 -0000	[thread overview]
Message-ID: <bug-56592-4-p9K1zhlQ3S@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-56592-4@http.gcc.gnu.org/bugzilla/>


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56592

--- Comment #2 from Oleg Endo <olegendo at gcc dot gnu.org> 2013-03-17 14:19:55 UTC ---
Regarding multi-word arguments:

> 'double' values are passed in DR registers, where the high 32 bits are passed
> in FR(n*2) and the low 32 bits in FR(n*2+1) regardless of the endian setting.
> 
> 4D 'float' vectors are passed in FV registers, i.e. FR(n*4), in order to avoid
> reg copies before vector insns (fipr, ftrv).

Multi-word integer values should be passed in little endian word order.  E.g.
'long long' (64 bit) would be passed in r1:r0, where r1 are the high 32 bits
and r0 are the low 32 bits.  This would make it easier to write endian neutral
asm code.


  parent reply	other threads:[~2013-03-17 14:20 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-10 23:43 [Bug target/56592] New: " olegendo at gcc dot gnu.org
2013-03-14  9:49 ` [Bug target/56592] " turkeyman at gmail dot com
2013-03-17 14:20 ` olegendo at gcc dot gnu.org [this message]
2015-10-08 11:15 ` olegendo at gcc dot gnu.org

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