From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14524 invoked by alias); 17 Mar 2013 14:20:39 -0000 Received: (qmail 14277 invoked by uid 48); 17 Mar 2013 14:19:58 -0000 From: "olegendo at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/56592] [SH] Add vector ABI Date: Sun, 17 Mar 2013 14:20:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: olegendo at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2013-03/txt/msg01245.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56592 --- Comment #2 from Oleg Endo 2013-03-17 14:19:55 UTC --- Regarding multi-word arguments: > 'double' values are passed in DR registers, where the high 32 bits are passed > in FR(n*2) and the low 32 bits in FR(n*2+1) regardless of the endian setting. > > 4D 'float' vectors are passed in FV registers, i.e. FR(n*4), in order to avoid > reg copies before vector insns (fipr, ftrv). Multi-word integer values should be passed in little endian word order. E.g. 'long long' (64 bit) would be passed in r1:r0, where r1 are the high 32 bits and r0 are the low 32 bits. This would make it easier to write endian neutral asm code.