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Subject: [Bug target/56620] Memcpy optimization may lead to unaligned access on ARM Thumb
Date: Thu, 14 Mar 2013 21:36:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D56620

--- Comment #6 from Marc Singer <eleventen at gmail dot com> 2013-03-14 21:=
35:54 UTC ---
For the sake of posterity, the Cortex-M3 and M4 do handle unaligned accesses
properly in hardware though with the expected performance penalty.  It is t=
he
fact that I enforced alignment by making configuration changes to the MCU t=
hat
caused the issue.  And I did so on the recommendation of ARM which isn't
universally justified in the Cortex TRM:

To ensure a smooth transition, ARM recommends that code designed to operate=
 on
other Cortex-M profile processor architectures obey the following rules and
configure the Configuration and Control Register (CCR) appropriately:
=E2=80=A2 =E2=80=A2 =E2=80=A2
use word transfers only to access registers in the NVIC and System Control
Space (SCS). treat all unused SCS registers and register fields on the
processor as Do-Not-Modify.
configure the following fields in the CCR:
=E2=80=94 STKALIGN bit to 1
=E2=80=94 UNALIGN_TRP bit to 1
=E2=80=94 Leave all other bits in the CCR register as their original value.