[Bug target/56788] New: _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[Bug target/56788] New: _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[glisse at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

             Bug #: 56788
           Summary: _mm_frcz_sd and _mm_frcz_ss ignore their second
                    argument
    Classification: Unclassified
           Product: gcc
           Version: 4.8.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: glisse@gcc.gnu.org
            Target: x86_64-linux-gnu


#include <x86intrin.h>
__m128d f(__m128d x, __m128d y){
  return _mm_frcz_sd(x,y);
}

is compiled to:

    vfrczsd    %xmm0, %xmm0
    ret

Notice the lack of any reference to xmm1...

In my opinion, __builtin_ia32_vfrczsd should take a single argument, and the
intrinsic should call first this builtin and then __builtin_ia32_movsd.

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[glisse at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #1 from Marc Glisse <glisse at gcc dot gnu.org> 2013-03-30 20:42:51 UTC ---
_mm_frcz_ss is inconsistent between compilers. Microsoft gives it 2 arguments
and movss-like semantics, whereas clang gives it a single argument. AMD doesn't
document intrinsics, and I can't find any relevant Intel doc.

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[glisse at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

Marc Glisse <glisse at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |dwarak.rajagopal at amd dot com,
                   |                            |harsha.jagasia at amd dot com

--- Comment #2 from Marc Glisse <glisse at gcc dot gnu.org> ---
Adding the authors of this code in Cc:, I don't know if they still work at AMD
though.

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2013-11-23
           Assignee|unassigned at gcc dot gnu.org      |ubizjak at gmail dot com
     Ever confirmed|0                           |1

--- Comment #3 from Uroš Bizjak <ubizjak at gmail dot com> ---
Created attachment 31278
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=31278&action=edit
Patch that fixes xop_vmfrcz<mode>3 patterns

Attached patch fixes xop_vmfrcz<mode>3 and compiles the test to:

f:
        vfrczsd %xmm1, %xmm0
        ret
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY228

--- Comment #4 from janus at gcc dot gnu.org ---
Author: janus
Date: Sat Nov 23 09:14:11 2013
New Revision: 205304

URL: http://gcc.gnu.org/viewcvs?rev 5304&root=gcc&view=rev
Log:
2013-11-23  Janus Weil  <janus@gcc.gnu.org>

    PR fortran/59228
    * interface.c (compare_parameter): Check for array spec.

2013-11-23  Janus Weil  <janus@gcc.gnu.org>

    PR fortran/59228
    * gfortran.dg/asynchronous_4.f90: New.

Added:
    trunk/gcc/testsuite/gfortran.dg/asynchronous_4.f90
Modified:
    trunk/gcc/fortran/ChangeLog
    trunk/gcc/fortran/interface.c
    trunk/gcc/testsuite/ChangeLog

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |4.7.4

--- Comment #4 from Uroš Bizjak <ubizjak at gmail dot com> ---
gcc follows Microsoft definition [1]:

__m128d _mm_frcz_ss (
   __m128 high,
   __m128 src
);

This should be the same as other "vm" (vector merge) instructions, for example
_mm_add_ss [2], also commented in gcc's xmmintrin.h:

/* Perform the respective operation on the lower SPFP (single-precision
   floating-point) values of A and B; the upper three SPFP values are
   passed through from A.  */

__m128 _mm_add_ss (__m128 __A, __m128 __B)
{
  return (__m128) __builtin_ia32_addss ((__v4sf)__A, (__v4sf)__B);
}

[1] http://msdn.microsoft.com/en-us/library/vstudio/gg445126%28v=vs.100%29.aspx
[2] http://msdn.microsoft.com/en-us/library/be94x2y6%28v=vs.90%29.aspx
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Subject: [Bug fortran/59228] ICE-on-invalid with assumed type and ASYNCHRONOUS
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY228

janus at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #5 from janus at gcc dot gnu.org ---
Fixed on trunk with r205304. Despite the fact that it might be viewed as a
regression, I don't think it's worth backporting to 4.8 (given that it's 'only'
ICE-on-invalid and was reported against trunk).

Closing as fixed. Thanks for the report!

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #5 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Marc Glisse from comment #1)
> _mm_frcz_ss is inconsistent between compilers. Microsoft gives it 2
> arguments and movss-like semantics, whereas clang gives it a single
> argument. AMD doesn't document intrinsics, and I can't find any relevant
> Intel doc.

clang is wrong, please see "Return value" section in [1]:

A 128-bit result r that contains four 32-bit floating-point values.

r[0] := fractional_part_of(src[0]);

r[i] := high[i]; // i = 1,2,3

[1] http://msdn.microsoft.com/en-us/library/vstudio/gg445126%28v=vs.100%29.aspx
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Subject: [Bug middle-end/59261] New: [4.9 regression] FAIL: gcc.dg/vect/bb-slp-26.c -flto -ffat-lto-objects (internal compiler error)
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59261

            Bug ID: 59261
           Summary: [4.9 regression] FAIL: gcc.dg/vect/bb-slp-26.c -flto
                    -ffat-lto-objects (internal compiler error)
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: schwab@linux-m68k.org
            Target: ia64-*-*

$ gcc/xgcc -B gcc/ ../gcc/testsuite/gcc.dg/vect/bb-slp-26.c -flto
-ffat-lto-objects -ftree-vectorize -fno-vect-cost-model -fno-common -O2 
../gcc/testsuite/gcc.dg/vect/bb-slp-26.c: In function ‘main’:
../gcc/testsuite/gcc.dg/vect/bb-slp-26.c:19:14: internal compiler error: in
expand_shift_1, at expmed.c:2247
       dst[0] += A*src[0] + src[stride];
              ^
0x40000000003db5bf expand_shift_1
        ../../gcc/expmed.c:2247
0x40000000003e55ef expand_mult_const
        ../../gcc/expmed.c:2937
0x40000000003e6e7f expand_mult(machine_mode, rtx_def*, rtx_def*, rtx_def*, int)
        ../../gcc/expmed.c:3195
0x4000000000423a7f expand_expr_real_2(separate_ops*, rtx_def*, machine_mode,
expand_modifier)
        ../../gcc/expr.c:8510
0x4000000000400d4f expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**)
        ../../gcc/expr.c:10556
0x4000000000403f0f expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**)
        ../../gcc/expr.c:9365
0x40000000004141cf expand_expr
        ../../gcc/expr.h:453
0x40000000004141cf expand_operands
        ../../gcc/expr.c:7516
0x400000000041c11f expand_expr_real_2(separate_ops*, rtx_def*, machine_mode,
expand_modifier)
        ../../gcc/expr.c:8340
0x4000000000400d4f expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**)
        ../../gcc/expr.c:10556
0x4000000000403f0f expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**)
        ../../gcc/expr.c:9365
0x40000000003fe85f expand_expr
        ../../gcc/expr.h:453
0x40000000003fe85f expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**)
        ../../gcc/expr.c:10343
0x4000000000403f0f expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**)
        ../../gcc/expr.c:9365
0x40000000004154df store_expr(tree_node*, rtx_def*, int, bool)
        ../../gcc/expr.c:5306
0x400000000041859f expand_assignment(tree_node*, tree_node*, bool)
        ../../gcc/expr.c:5092
0x400000000023c8af expand_gimple_stmt_1
        ../../gcc/cfgexpand.c:3199
0x400000000023c8af expand_gimple_stmt
        ../../gcc/cfgexpand.c:3295
0x400000000023fdcf expand_gimple_basic_block
        ../../gcc/cfgexpand.c:5135
0x4000000000243eef gimple_expand_cfg
        ../../gcc/cfgexpand.c:5701
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Subject: [Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idV788

--- Comment #6 from Marc Glisse <glisse at gcc dot gnu.org> ---
Uros, I can't seem to find the AMD documentation anymore (marketing has gotten
hold of the website and tech info got hidden somewhere deep), but if I remember
correctly, vfrczsd %xmm0, %xmm1 does:

xmm0[0]=frcz(xmm1[0])
xmm0[1+]=0

That's why I think the builtin should take a single argument, and if you want
the Microsoft behavior, you need an additional movsd.

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[glisse at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #7 from Marc Glisse <glisse at gcc dot gnu.org> ---
Ah no, I was wrong, sorry about that:

The VFRCZSS and VFRCZSD instructions extract the fractional portion of the
single-/double-precision scalar floating-point value in an XMM register or 32-
or 64-bit memory location and writes the result in the lower element of the
destination register. The upper elements of the destination XMM register are
unaffected by the operation, while the upper 128 bits of the
corresponding YMM register are cleared to zeros

http://support.amd.com/TechDocs/43479.pdf

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #8 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Marc Glisse from comment #7)
> Ah no, I was wrong, sorry about that:
> 
> The VFRCZSS and VFRCZSD instructions extract the fractional portion of the
> single-/double-precision scalar floating-point value in an XMM register or
> 32- or 64-bit memory location and writes the result in the lower element of
> the destination register. The upper elements of the destination XMM register
> are unaffected by the operation, while the upper 128 bits of the
> corresponding YMM register are cleared to zeros
> 
> http://support.amd.com/TechDocs/43479.pdf

Hm from the same document, I read (v3.04, page 122) for vfrczsd:

When the result is written to the destination XMM register, the upper quadword
of the destination register and the upper 128-bits of the corresponding YMM
register are cleared to zeros.

Page 126, vfrczss:

When the result is written to the destination XMM register, the upper three
doub
lewords of the destination register and the upper 128-bits of the corresponding
YMM register are cleared to zeros.

The upper 224 bits of the YMM destination register are cleared to zeros.

So, the instruction itself *does* clear upper bits to zero.
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Subject: [Bug sanitizer/59258] usan: ICE(segfault): stack-buffer-overflow with -fsanitize=undefined
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY258

Marek Polacek <mpolacek at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2013-11-23
           Assignee|unassigned at gcc dot gnu.org      |mpolacek at gcc dot gnu.org
   Target Milestone|---                         |4.9.0
     Ever confirmed|0                           |1

--- Comment #1 from Marek Polacek <mpolacek at gcc dot gnu.org> ---
Ugh, of course.  This should fix it.  Thanks for the report.

--- a/gcc/ubsan.c
+++ b/gcc/ubsan.c
@@ -388,7 +388,7 @@ ubsan_create_data (const char *name, location_t loc,
 {
   va_list args;
   tree ret, t;
-  tree fields[3];
+  tree fields[5];
   vec<tree, va_gc> *saved_args = NULL;
   size_t i = 0;

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
  Attachment #31278|0                           |1
        is obsolete|                            |

--- Comment #9 from Uroš Bizjak <ubizjak at gmail dot com> ---
Created attachment 31279
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=31279&action=edit
Patch that fixes _mm_frcz_{ss,sd} intrinsics

This patch fixes _mm_frcz_{ss,sd} intrinsics. The testcase now compiles to:

        vfrczsd %xmm1, %xmm1
        vmovsd  %xmm1, %xmm0, %xmm0
        ret
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From: "vincenzo.innocente at cern dot ch" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/59262] New: __attribute__ ((optimize()))  broken (and corrupts optimization of the whole compilation unit)
Date: Sat, 23 Nov 2013 11:58:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY262

            Bug ID: 59262
           Summary: __attribute__ ((optimize()))  broken (and corrupts
                    optimization of the whole compilation unit)
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: vincenzo.innocente at cern dot ch

in latest 4.9. seen in 4.8.1 too
take
cat attribute.cc
inline float sum(float x, float y) { return x+y;}


#ifdef OPT1
float foo1() __attribute__ ((optimize("O3", "fast-math")));
#endif
#ifdef OPT2
float foo2() __attribute__ ((optimize("fast-math")));
#endif
#ifdef OPT3
float foo3() __attribute__ ((optimize("O3")));
#endif

float x[1024], y[1024];

float foo1() {
  float ret=0;
  for (int i=0; i<1024; ++i)
     ret += sum(x[i],y[i]);
  return ret;
}


float foo2() {
  float ret=0;
  for (int i=0; i<1024; ++i)
     ret += sum(x[i],y[i]);
  return ret;
}


float foo3() {
  float ret=0;
  for (int i=0; i<1024; ++i)
     ret += sum(x[i],y[i]);
  return ret;
}


float bar() {
  float ret=0;
  for (int i=0; i<1024; ++i)
     ret += sum(x[i],y[i]);
  return ret;
}

c++ -O2 -ftree-vectorize -S attribute.cc -march=corei7 -DOPT1 ; cat attribute.s
    .file    "attribute.cc"
    .section    .text._Z3sumff,"axG",@progbits,_Z3sumff,comdat
    .p2align 4,,15
    .weak    _Z3sumff
    .type    _Z3sumff, @function
_Z3sumff:
.LFB0:
    .cfi_startproc
    addss    %xmm1, %xmm0
    ret
    .cfi_endproc
.LFE0:
    .size    _Z3sumff, .-_Z3sumff
    .text
    .p2align 4,,-1
    .globl    _Z4foo1v
    .type    _Z4foo1v, @function
_Z4foo1v:
.LFB1:
    .cfi_startproc
    pushq    %rbx
    .cfi_def_cfa_offset 16
    .cfi_offset 3, -16
    pxor    %xmm3, %xmm3
    xorl    %ebx, %ebx
    subq    $16, %rsp
    .cfi_def_cfa_offset 32
    movss    %xmm3, 12(%rsp)
    .p2align 4,,10
    .p2align 3
.L3:
    movss    x(%rbx), %xmm0
    addq    $4, %rbx
    movss    y-4(%rbx), %xmm1
    call    _Z3sumff
    addss    12(%rsp), %xmm0
    movss    %xmm0, 12(%rsp)
    cmpq    $4096, %rbx
    jne    .L3
    addq    $16, %rsp
    .cfi_def_cfa_offset 16
    popq    %rbx
    .cfi_def_cfa_offset 8
    ret
    .cfi_endproc
.LFE1:
    .size    _Z4foo1v, .-_Z4foo1v
    .p2align 4,,15
    .globl    _Z4foo2v
    .type    _Z4foo2v, @function
_Z4foo2v:
.LFB2:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L8:
    movaps    x(%rax), %xmm1
    addq    $16, %rax
    addps    y-16(%rax), %xmm1
    addps    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L8
    haddps    %xmm0, %xmm0
    haddps    %xmm0, %xmm0
    addss    .LC0(%rip), %xmm0
    ret
    .cfi_endproc
.LFE2:
    .size    _Z4foo2v, .-_Z4foo2v
    .p2align 4,,15
    .globl    _Z4foo3v
    .type    _Z4foo3v, @function
_Z4foo3v:
.LFB3:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L11:
    movaps    x(%rax), %xmm1
    addq    $16, %rax
    addps    y-16(%rax), %xmm1
    addps    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L11
    haddps    %xmm0, %xmm0
    haddps    %xmm0, %xmm0
    addss    .LC0(%rip), %xmm0
    ret
    .cfi_endproc
.LFE3:
    .size    _Z4foo3v, .-_Z4foo3v
    .p2align 4,,15
    .globl    _Z3barv
    .type    _Z3barv, @function
_Z3barv:
.LFB4:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L14:
    movaps    x(%rax), %xmm1
    addq    $16, %rax
    addps    y-16(%rax), %xmm1
    addps    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L14
    haddps    %xmm0, %xmm0
    haddps    %xmm0, %xmm0
    addss    .LC0(%rip), %xmm0
    ret
    .cfi_endproc
.LFE4:
    .size    _Z3barv, .-_Z3barv
    .globl    y
    .bss
    .align 32
    .type    y, @object
    .size    y, 4096
y:
    .zero    4096
    .globl    x
    .align 32
    .type    x, @object
    .size    x, 4096
x:
    .zero    4096
    .section    .rodata.cst4,"aM",@progbits,4
    .align 4
.LC0:
    .long    0
    .ident    "GCC: (GNU) 4.9.0 20131110 (experimental) [trunk revision
204623]"
    .section    .note.GNU-stack,"",@progbits
 c++ -O2 -ftree-vectorize -S attribute.cc -march=corei7 -DOPT2 ; cat
attribute.s
    .file    "attribute.cc"
    .text
    .p2align 4,,15
    .globl    _Z4foo1v
    .type    _Z4foo1v, @function
_Z4foo1v:
.LFB1:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L2:
    movaps    x(%rax), %xmm1
    addq    $16, %rax
    addps    y-16(%rax), %xmm1
    addps    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L2
    haddps    %xmm0, %xmm0
    haddps    %xmm0, %xmm0
    addss    .LC0(%rip), %xmm0
    ret
    .cfi_endproc
.LFE1:
    .size    _Z4foo1v, .-_Z4foo1v
    .p2align 4,,-1
    .globl    _Z4foo2v
    .type    _Z4foo2v, @function
_Z4foo2v:
.LFB2:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L6:
    movss    x(%rax), %xmm1
    addq    $4, %rax
    addss    y-4(%rax), %xmm1
    addss    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L6
    ret
    .cfi_endproc
.LFE2:
    .size    _Z4foo2v, .-_Z4foo2v
    .p2align 4,,15
    .globl    _Z4foo3v
    .type    _Z4foo3v, @function
_Z4foo3v:
.LFB3:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L9:
    movaps    x(%rax), %xmm1
    addq    $16, %rax
    addps    y-16(%rax), %xmm1
    addps    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L9
    haddps    %xmm0, %xmm0
    haddps    %xmm0, %xmm0
    addss    .LC0(%rip), %xmm0
    ret
    .cfi_endproc
.LFE3:
    .size    _Z4foo3v, .-_Z4foo3v
    .p2align 4,,15
    .globl    _Z3barv
    .type    _Z3barv, @function
_Z3barv:
.LFB4:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L12:
    movaps    x(%rax), %xmm1
    addq    $16, %rax
    addps    y-16(%rax), %xmm1
    addps    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L12
    haddps    %xmm0, %xmm0
    haddps    %xmm0, %xmm0
    addss    .LC0(%rip), %xmm0
    ret
    .cfi_endproc
.LFE4:
    .size    _Z3barv, .-_Z3barv
    .globl    y
    .bss
    .align 32
    .type    y, @object
    .size    y, 4096
y:
    .zero    4096
    .globl    x
    .align 32
    .type    x, @object
    .size    x, 4096
x:
    .zero    4096
    .section    .rodata.cst4,"aM",@progbits,4
    .align 4
.LC0:
    .long    0
    .ident    "GCC: (GNU) 4.9.0 20131110 (experimental) [trunk revision
204623]"
    .section    .note.GNU-stack,"",@progbits

[innocent@vinavx2 bugs48]$ c++ -O2 -ftree-vectorize -S attribute.cc
-march=corei7 -DOPT3 ; cat attribute.s
    .file    "attribute.cc"
    .section    .text._Z3sumff,"axG",@progbits,_Z3sumff,comdat
    .p2align 4,,15
    .weak    _Z3sumff
    .type    _Z3sumff, @function
_Z3sumff:
.LFB0:
    .cfi_startproc
    addss    %xmm1, %xmm0
    ret
    .cfi_endproc
.LFE0:
    .size    _Z3sumff, .-_Z3sumff
    .text
    .p2align 4,,15
    .globl    _Z4foo1v
    .type    _Z4foo1v, @function
_Z4foo1v:
.LFB1:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L3:
    movss    y(%rax), %xmm1
    addq    $4, %rax
    addss    x-4(%rax), %xmm1
    addss    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L3
    ret
    .cfi_endproc
.LFE1:
    .size    _Z4foo1v, .-_Z4foo1v
    .p2align 4,,15
    .globl    _Z4foo2v
    .type    _Z4foo2v, @function
_Z4foo2v:
.LFB2:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L7:
    movss    y(%rax), %xmm1
    addq    $4, %rax
    addss    x-4(%rax), %xmm1
    addss    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L7
    ret
    .cfi_endproc
.LFE2:
    .size    _Z4foo2v, .-_Z4foo2v
    .p2align 4,,-1
    .globl    _Z4foo3v
    .type    _Z4foo3v, @function
_Z4foo3v:
.LFB3:
    .cfi_startproc
    pushq    %rbx
    .cfi_def_cfa_offset 16
    .cfi_offset 3, -16
    pxor    %xmm3, %xmm3
    xorl    %ebx, %ebx
    subq    $16, %rsp
    .cfi_def_cfa_offset 32
    movss    %xmm3, 12(%rsp)
    .p2align 4,,10
    .p2align 3
.L10:
    movss    x(%rbx), %xmm0
    addq    $4, %rbx
    movss    y-4(%rbx), %xmm1
    call    _Z3sumff
    addss    12(%rsp), %xmm0
    movss    %xmm0, 12(%rsp)
    cmpq    $4096, %rbx
    jne    .L10
    addq    $16, %rsp
    .cfi_def_cfa_offset 16
    popq    %rbx
    .cfi_def_cfa_offset 8
    ret
    .cfi_endproc
.LFE3:
    .size    _Z4foo3v, .-_Z4foo3v
    .p2align 4,,15
    .globl    _Z3barv
    .type    _Z3barv, @function
_Z3barv:
.LFB4:
    .cfi_startproc
    xorl    %eax, %eax
    pxor    %xmm0, %xmm0
    .p2align 4,,10
    .p2align 3
.L14:
    movss    y(%rax), %xmm1
    addq    $4, %rax
    addss    x-4(%rax), %xmm1
    addss    %xmm1, %xmm0
    cmpq    $4096, %rax
    jne    .L14
    ret
    .cfi_endproc
.LFE4:
    .size    _Z3barv, .-_Z3barv
    .globl    y
    .bss
    .align 32
    .type    y, @object
    .size    y, 4096
y:
    .zero    4096
    .globl    x
    .align 32
    .type    x, @object
    .size    x, 4096
x:
    .zero    4096
    .ident    "GCC: (GNU) 4.9.0 20131110 (experimental) [trunk revision
204623]"
    .section    .note.GNU-stack,"",@progbits


notice how
float foo1() __attribute__ ((optimize("O3", "fast-math")));
manages to vectorize foo2,foo3,bar while prevents inlining in foo1 itself...
float foo2() __attribute__ ((optimize("fast-math")));
instead vectorize all others BUT foo2

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[glisse at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #10 from Marc Glisse <glisse at gcc dot gnu.org> ---
(In reply to Uroš Bizjak from comment #9)
> Patch that fixes _mm_frcz_{ss,sd} intrinsics

Looks good (assuming the detailed description is more correct than the
high-level one in AMD's doc), thank you.

Arguably the LLVM intrinsic is more useful than the Microsoft one, but that's a
different issue that doesn't matter that much.
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Subject: [Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #11 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Marc Glisse from comment #10)
> (In reply to Uroš Bizjak from comment #9)
> 
> Arguably the LLVM intrinsic is more useful than the Microsoft one, but
> that's a different issue that doesn't matter that much.

I left the prototype the way it was.

Marc, since it looks you have access to XOP target (I don't have one), can you
please write an XOP testcase for frcz insns? You can look at
gcc.target/i386/xop-*.c. frcz tests are mysteriously missing there, with usual
"untested code" consequences.
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY061

--- Comment #31 from Sergey Matveev <earthdok at google dot com> ---
(In reply to Kostya Serebryany from comment #30)
> lsan's allocator clears all memory using internal_memset, which is damn
> slow. (sets on byte at a time)
>
> asan's allocator doesn't do that (it sets first 4K bytes of allocated region
> with garbage using the REAL fast memset)
>
> I think the right solution is to finally implement *fast* internal_memset.
> We'll do that.
>
> Sergey, can this difference between asan and lsan allocators cause
> false negatives/positives in lsan?

It can cause a false negative if there's a stale pointer outside of those 4k.
But in practice 4k ought to be enough for anybody.

I think standalone LSan should support the max_alloc_fill_size flag. I'll also
change it to use real memset.

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[glisse at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #12 from Marc Glisse <glisse at gcc dot gnu.org> ---
(In reply to Uroš Bizjak from comment #11)
> I left the prototype the way it was.

Makes sense to me.

> Marc, since it looks you have access to XOP target (I don't have one), can
> you please write an XOP testcase for frcz insns?

Sorry, I don't have access to a XOP target, that's why I've been relying on the
AMD documentation (I would have just tested it otherwise). I only noticed this
issue because I was writing a patch (long discussion with rth) changing the
pattern of a lot of the vec_merge scalar operations (that got postponed, if not
abandoned).

The authors of this code are in Cc:, Ganesh added himself some time ago, I am
hoping someone from AMD will eventually react.
>From gcc-bugs-return-435623-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Sat Nov 23 13:20:41 2013
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Subject: [Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument
Date: Sat, 23 Nov 2013 13:20:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|x86_64-linux-gnu            |x86
                URL|                            |http://gcc.gnu.org/ml/gcc-p
                   |                            |atches/2013-11/msg02978.htm
                   |                            |l

--- Comment #13 from Uroš Bizjak <ubizjak at gmail dot com> ---
Patch at [1].

[1] http://gcc.gnu.org/ml/gcc-patches/2013-11/msg02978.html
>From gcc-bugs-return-435624-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Sat Nov 23 13:24:25 2013
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From: "uros at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idV788

--- Comment #14 from uros at gcc dot gnu.org ---
Author: uros
Date: Sat Nov 23 13:24:19 2013
New Revision: 205306

URL: http://gcc.gnu.org/viewcvs?rev 5306&root=gcc&view=rev
Log:
    PR target/56788
    * config/i386/i386.c (bdesc_multi_arg) <IX86_BUILTIN_VFRCZSS>:
    Declare as MULTI_ARG_1_SF instruction.
    <IX86_BUILTIN_VFRCZSD>: Decleare as MULTI_ARG_1_DF instruction.
    * config/i386/sse.md (*xop_vmfrcz<mode>2): Rename
    from *xop_vmfrcz_<mode>.
    * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss
    to merge scalar result with __A.
    (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar
    result with __A.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/i386/i386.c
    trunk/gcc/config/i386/sse.md
    trunk/gcc/config/i386/xopintrin.h

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[uros at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #15 from uros at gcc dot gnu.org ---
Author: uros
Date: Wed Nov 27 18:07:22 2013
New Revision: 205458

URL: http://gcc.gnu.org/viewcvs?rev=205458&root=gcc&view=rev
Log:
    PR target/56788
    * gcc.target/i386/xop-frczX.c: New test.


Added:
    trunk/gcc/testsuite/gcc.target/i386/xop-frczX.c
Modified:
    trunk/gcc/testsuite/ChangeLog

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[uros at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #16 from uros at gcc dot gnu.org ---
Author: uros
Date: Thu Nov 28 16:48:44 2013
New Revision: 205495

URL: http://gcc.gnu.org/viewcvs?rev=205495&root=gcc&view=rev
Log:
    Backport from mainline
    2013-11-23  Uros Bizjak  <ubizjak@gmail.com>

    PR target/56788
    * config/i386/i386.c (bdesc_multi_arg) <IX86_BUILTIN_VFRCZSS>:
    Declare as MULTI_ARG_1_SF instruction.
    <IX86_BUILTIN_VFRCZSD>: Decleare as MULTI_ARG_1_DF instruction.
    * config/i386/sse.md (*xop_vmfrcz<mode>2): Rename
    from *xop_vmfrcz_<mode>.
    * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss
    to merge scalar result with __A.
    (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar
    result with __A.

testsuite/ChangeLog:

    Backport from mainline
    2013-11-27  Uros Bizjak  <ubizjak@gmail.com>
            Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

    PR target/56788
    * gcc.target/i386/xop-frczX.c: New test.


Added:
    branches/gcc-4_8-branch/gcc/testsuite/gcc.target/i386/xop-frczX.c
Modified:
    branches/gcc-4_8-branch/gcc/ChangeLog
    branches/gcc-4_8-branch/gcc/config/i386/i386.c
    branches/gcc-4_8-branch/gcc/config/i386/sse.md
    branches/gcc-4_8-branch/gcc/config/i386/xopintrin.h
    branches/gcc-4_8-branch/gcc/testsuite/ChangeLog

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[uros at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

--- Comment #17 from uros at gcc dot gnu.org ---
Author: uros
Date: Thu Nov 28 18:14:23 2013
New Revision: 205497

URL: http://gcc.gnu.org/viewcvs?rev=205497&root=gcc&view=rev
Log:
    Backport from mainline
    2013-11-23  Uros Bizjak  <ubizjak@gmail.com>

    PR target/56788
    * config/i386/i386.c (bdesc_multi_arg) <IX86_BUILTIN_VFRCZSS>:
    Declare as MULTI_ARG_1_SF instruction.
    <IX86_BUILTIN_VFRCZSD>: Decleare as MULTI_ARG_1_DF instruction.
    * config/i386/sse.md (*xop_vmfrcz<mode>2): Rename
    from *xop_vmfrcz_<mode>.
    * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss
    to merge scalar result with __A.
    (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar
    result with __A.

testsuite/ChangeLog:

    Backport from mainline
    2013-11-27  Uros Bizjak  <ubizjak@gmail.com>
            Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

    PR target/56788
    * gcc.target/i386/xop-frczX.c: New test.


Added:
    branches/gcc-4_7-branch/gcc/testsuite/gcc.target/i386/xop-frczX.c
Modified:
    branches/gcc-4_7-branch/gcc/ChangeLog
    branches/gcc-4_7-branch/gcc/config/i386/i386.c
    branches/gcc-4_7-branch/gcc/config/i386/sse.md
    branches/gcc-4_7-branch/gcc/config/i386/xopintrin.h
    branches/gcc-4_7-branch/gcc/testsuite/ChangeLog

[Bug target/56788] _mm_frcz_sd and _mm_frcz_ss ignore their second argument

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56788

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #18 from Uroš Bizjak <ubizjak at gmail dot com> ---
Fixed everywhere.
>From gcc-bugs-return-436168-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Thu Nov 28 18:33:25 2013
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From: "astra at ionic dot at" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug regression/59320] ftree-vrp breaks simple loops
Date: Thu, 28 Nov 2013 18:33:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY320

--- Comment #6 from David Kaufmann <astra at ionic dot at> ---
(In reply to Richard Biener from comment #4)
> Please attach a testcase or at least preprocessed source of w_drawprim.c.
a testcase is the first attachment to this bug with either xfig version 3.2.5b
or 3.2.5c.
debian and fedora have currently version 3.2.5b in their repository.

i could reproduce the error in fedora-f18.x86_64 and fedora-f19.x86_64.

currently i do not have another system which has been updated recently and is
configured for compiling, maybe i'll find one in the next few days.

any input is welcome.