[Bug target/57648] New: Illegal use ARM Cortex M3 instruction LDMIA causes UserFault

[Bug target/57648] New: Illegal use ARM Cortex M3 instruction LDMIA causes UserFault

[v.van.beveren at nikhef dot nl]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57648

            Bug ID: 57648
           Summary: Illegal use ARM Cortex M3 instruction LDMIA causes
                    UserFault
           Product: gcc
           Version: 4.7.2
            Status: UNCONFIRMED
          Severity: major
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: v.van.beveren at nikhef dot nl

Created attachment 30322
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=30322&action=edit
Test-case generating UserFault

When copying a struct into another struct, GCC's ARM back-end generates code in
which the LDMIA instruction is used. This instruction expects word-aligned
addresses. However, in some cases this is not true, causing a UserFault.

See this function:

  TestStruct target;

  void copyStruct(TestStruct * toCopy)
  {
    target = *toCopy;   // illegal instruction is generated here.
  }

Causes this code to be generated:

000005d8 <copyStruct>:
     5d8:    b082          sub    sp, #8
     5da:    9001          str    r0, [sp, #4]
     5dc:    4b03          ldr    r3, [pc, #12]    ; (5ec <copyStruct+0x14>)
     5de:    9a01          ldr    r2, [sp, #4]
     5e0:    ca07          ldmia    r2, {r0, r1, r2} ; UserFault if (r2 & 0x3)
!= 0
     5e2:    e883 0007     stmia.w    r3, {r0, r1, r2}
     5e6:    b002          add    sp, #8
     5e8:    4770          bx    lr
     5ea:    bf00          nop
     5ec:    200005ec     .word    0x200005ec

Its not said in so-many words in the ARM description, but I believe that r2 at
line 0x5e0 should be word aligned. I have verified with a debugger that this is
the line which causes the UserFault.

See:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/BABCAEDD.html

Complete test-case attached. Note that I used an Energy Micro Cortex M3
processor. You may need to modify it for your specific MCU. In this scenario it
does not matter what optimization one enables, however, I first noticed the
issue when compiling with -Os, which caused packing and non-word aligned
structures.

[Bug target/57648] Illegal use ARM Cortex M3 instruction LDMIA causes UserFault

[pinskia at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57648

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|wrong-code                  |
             Target|ARM Cortex M3               |
               Host|Windows 7 x64               |
      Known to fail|4.6.3, 4.7.2                |
              Build|4.7.2                       |

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
What options did you configure GCC with?
What options are you using to compile the source with?

I think this is note in the changes page is what you need to read in this case:
On ARM, when compiling for ARMv6 (but not ARMv6-M), ARMv7-A, ARMv7-R, or
ARMv7-M, the new option -munaligned-access is active by default, which for some
sources generates code that accesses memory on unaligned addresses. This
requires the kernel of those systems to enable such accesses (controlled by
CP15 register c1, refer to ARM documentation). Alternatively, or for
compatibility with kernels where unaligned accesses are not supported, all code
has to be compiled with -mno-unaligned-access. Upstream Linux kernel releases
have automatically and unconditionally supported unaligned accesses as emitted
by GCC due to this option being active since version 2.6.28.

[Bug target/57648] Illegal use ARM Cortex M3 instruction LDMIA causes UserFault

[rearnsha at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57648

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |INVALID

--- Comment #2 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
static uint8_t source[sizeof(TestStruct) + 4] __attribute__((aligned(4)));
...
    // create a half-word aligned structure (fails!)
    TestStruct * sourcePtrFail = (TestStruct *) &(source[2]);

This has undefined behaviour.  Your TestStruct defintion is required (by the
ABI) to have word alignment.