From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 20537 invoked by alias); 31 Jul 2013 16:42:22 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 20467 invoked by uid 48); 31 Jul 2013 16:42:19 -0000 From: "jamborm at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/57748] [4.8/4.9 Regression] ICE on ARM with -mfloat-abi=softfp -mfpu=neon Date: Wed, 31 Jul 2013 16:42:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: middle-end X-Bugzilla-Version: 4.8.0 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: jamborm at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 4.8.2 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2013-07/txt/msg01568.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57748 --- Comment #11 from Martin Jambor --- (In reply to Bernd Edlinger from comment #8) > (In reply to Martin Jambor from comment #7) > > In any event, it is clear that > > the code in expand_assignment cannot cope with unaligned tem and non-NULL > > offset. So currently I'm considering the following patch, although I am not > > really sure it is enough (it does fix the ICE, though). If you can run the > > testcase on the platform, would you run it with this patch applied, please? > > No, unfortunately I can only look at the assembler listing. > > But wait a moment... > > If the object is assumed to be unaligned here this patch will > likely just compute the unaligned address, add the offset, > and store the result there without any special precautions. > While the code in the if statement seems to store the expression > on a register and move that register to the final destination. > > Well, I believe this unaligned arrays are generally broken. > > consider this example: With or without the patch? If without the patch and you are reasonably confident the output is indeed wrong, please open a new PR (and CC me, I'm interested) because this particular ICE is certainly caused by trailing zero sized arrays. I have tried reproducing your problem with x86_64 MMX vectors but couldn't. I do not have access to an ARM machine to verify myself. Thanks.