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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/58166] ARMv5: poor register allocation in function
 containing smull instruction
Date: Thu, 28 Mar 2024 05:08:57 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
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X-Bugzilla-Product: gcc
X-Bugzilla-Component: target
X-Bugzilla-Version: 4.9.0
X-Bugzilla-Keywords: missed-optimization
X-Bugzilla-Severity: normal
X-Bugzilla-Who: pinskia at gcc dot gnu.org
X-Bugzilla-Status: RESOLVED
X-Bugzilla-Resolution: FIXED
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: 5.0
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D58166

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
   Target Milestone|---                         |5.0
         Resolution|---                         |FIXED

--- Comment #7 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
The trunk-GCC9 produces:
```
        mov     r3, r0
        mov     r2, r1
        smull   r0, r1, r3, r2
        bx      lr
```

GCC 5.4.0-8.5.0 produces:
```
        smull   r2, r3, r0, r1
        mov     r0, r2
        mov     r1, r3
        bx      lr
```

I don't have a 4.9.x compiler around to test.

So I am going to assume this was fixed, at least in GCC 5.=