[Bug target/58460] New: Error: shift amount out of range 0 to 4 at operand 3 -- `sub sp,x1,x0,lsl 9'

[Bug target/58460] New: Error: shift amount out of range 0 to 4 at operand 3 -- `sub sp,x1,x0,lsl 9'

[schwab@linux-m68k.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58460

            Bug ID: 58460
           Summary: Error: shift amount out of range 0 to 4 at operand 3
                    -- `sub sp,x1,x0,lsl 9'
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: schwab@linux-m68k.org
                CC: marcus.shawcroft at arm dot com
            Target: aarch64-*-*

Created attachment 30851
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=30851&action=edit
Preprocessed source

$ gcc/xgcc -Bgcc/ -O -c set_mlock.i 
/tmp/ccHX90M4.s: Assembler messages:
/tmp/ccHX90M4.s:22: Error: shift amount out of range 0 to 4 at operand 3 --
`sub sp,x1,x0,lsl 9'

[Bug target/58460] Error: shift amount out of range 0 to 4 at operand 3 -- `sub sp,x1,x0,lsl 9'

[mshawcroft at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58460

mshawcroft at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |mshawcroft at gcc dot gnu.org
   Target Milestone|---                         |4.8.2
      Known to fail|                            |4.8.0, 4.8.1

--- Comment #1 from mshawcroft at gcc dot gnu.org ---
r203157 | mshawcroft | 2013-10-03 11:54:36 +0100 (Thu, 03 Oct 2013) | 7 lines

[AArch64] Fix PR58460

PR58460, the add and sub shifted register instruction forms in AArch64
do not permit the stack register.  This patch removes k constraint
from the relevant patterns and adds reduced form of the test case.

[Bug target/58460] Error: shift amount out of range 0 to 4 at operand 3 -- `sub sp,x1,x0,lsl 9'

[mshawcroft at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58460

--- Comment #2 from mshawcroft at gcc dot gnu.org ---
Author: mshawcroft
Date: Fri Oct  4 14:57:04 2013
New Revision: 203204

URL: http://gcc.gnu.org/viewcvs?rev=203204&root=gcc&view=rev
Log:
[AArch64] Fix PR58460.

2013-10-04  Marcus Shawcroft  <marcus.shawcroft@arm.com>

    Backport from mainline.

    PR target/58460
    * config/aarch64/aarch64.md (*add_<shift>_<mode>)
    (*add_<shift>_si_uxtw,*add_mul_imm_<mode>)
    (*sub_<shift>_<mode>)
    (*sub_<shift>_si_uxtw,*sub_mul_imm_<mode>, *sub_mul_imm_si_uxtw):
    Remove k constraint.



Added:
    branches/gcc-4_8-branch/gcc/testsuite/gcc.target/aarch64/pr58460.c
Modified:
    branches/gcc-4_8-branch/gcc/ChangeLog
    branches/gcc-4_8-branch/gcc/config/aarch64/aarch64.md
    branches/gcc-4_8-branch/gcc/testsuite/ChangeLog

[Bug target/58460] Error: shift amount out of range 0 to 4 at operand 3 -- `sub sp,x1,x0,lsl 9'

[mshawcroft at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58460

mshawcroft at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |FIXED

--- Comment #3 from mshawcroft at gcc dot gnu.org ---
Fix for 4.8.2+