[Bug c++/59163] New: program compiled with g++ -O3 segfaults

[Bug c++/59163] New: program compiled with g++ -O3 segfaults

[donnyjward at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

            Bug ID: 59163
           Summary: program compiled with g++ -O3 segfaults
           Product: gcc
           Version: 4.8.2
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c++
          Assignee: unassigned at gcc dot gnu.org
          Reporter: donnyjward at gmail dot com

Created attachment 31232
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=31232&action=edit
Stripped preprocessed C++ source.

The attached test case crashes (segmentation fault) when run. It is a
preprocessed file where I stripped just about everything from <algorithm>
except std::for_each.

gcc -v:

~/src $ gcc -v
Using built-in specs.
COLLECT_GCC=/usr/bin/gcc
COLLECT_LTO_WRAPPER=/app/gcc/4.8.2/libexec/gcc/x86_64-unknown-linux-gnu/4.8.2/lto-wrapper
Target: x86_64-unknown-linux-gnu
Configured with: ./gcc-4.8.2/configure --prefix=/app/gcc/4.8.2
--enable-languages=c,c++ --disable-multilib
Thread model: posix
gcc version 4.8.2 (GCC) 
~/src $ 


The complete command line that triggers the bug:
g++ -O3 -std=c++11 -Wall -Wextra bug2.ii

...then run the output program to see the segmentation fault

I tried building with:
g++ -O3 -std=c++11 -fno-strict-aliasing -fwrapv
-fno-aggressive-loop-optimizations -Wall -Wextra bug2.ii

...and the same crash occurs.

The compiler outputs no messages (no warnings errors etc).

The program runs without crashing if compiled with -O0, -O1, -O2, or -Os.

I compiled with the latest version of clang++ bundled with Mac's XCode, trying
each optimization level and the program runs fine. Same with the latest version
of MSVC (Visual Studio 2013).


The gdb segfault and backtrace:
Program received signal SIGSEGV, Segmentation fault.
0x00000000004007a7 in Quaternion::slerp(Quaternion const&, Quaternion const&)
() at bug2.ii:82
82    {
(gdb) bt
#0  0x00000000004007a7 in Quaternion::slerp(Quaternion const&, Quaternion
const&) () at bug2.ii:82
#1  0x0000000000400475 in main () at bug2.ii:97
(gdb) 


Extra observations:
If I comment out "int parent" in the struct definition so that the struct
becomes

  struct Joint
  {
    //int parent;
    Quaternion orient;
  };

the program no longer segfaults when compiled/run.

[Bug rtl-optimization/59163] program compiled with g++ -O3 segfaults

[redi at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

Jonathan Wakely <redi at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2013-11-18
     Ever confirmed|0                           |1

--- Comment #1 from Jonathan Wakely <redi at gcc dot gnu.org> ---
With 4.8 -fno-tree-vectorize prevents the segfault

It works on trunk with -O3, but fails if -ftree-vectorize is added.

[Bug rtl-optimization/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[rguenth at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |4.7.3
   Target Milestone|---                         |4.8.3
            Summary|program compiled with g++   |[4.8/4.9 Regression]
                   |-O3 segfaults               |program compiled with g++
                   |                            |-O3 segfaults

[Bug tree-optimization/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[rguenth at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P2

[Bug tree-optimization/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org

--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Started with r190492.

[Bug tree-optimization/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Reduced testcase for -O3:
struct A { float a[4]; };
struct B { int b; A a; };

__attribute__((noinline, noclone)) void
bar (A &a)
{
  if (a.a[0] != 36.0f || a.a[1] != 42.0f || a.a[2] != 48.0f || a.a[3] != 54.0f)
    __builtin_abort ();
}

__attribute__((noinline, noclone)) void
foo (A &a)
{
  int i;
  A c = a;
  for (i = 0; i < 4; i++)
    c.a[i] *= 6.0f;
  a = c;
  bar (a);
}

int
main ()
{
  B b = { 5, { 6, 7, 8, 9 } };
  foo (b.a);
}

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[rguenth at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |wrong-code
             Target|                            |x86_64-*-*
          Component|tree-optimization           |target

--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> ---
target issue then?

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |uros at gcc dot gnu.org

--- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Looks like it, yes.
In *.jump we still have (IMHO correct):
(insn 2 4 3 2 (set (reg/v/f:DI 89 [ a ])
        (reg:DI 5 di [ a ])) pr59163-2.C:13 85 {*movdi_internal}
     (nil))
(note 3 2 6 2 NOTE_INSN_FUNCTION_BEG)
(insn 6 3 7 2 (set (reg:TI 90)
        (mem:TI (reg/v/f:DI 89 [ a ]) [3 MEM[(const struct A &)a_4(D)]+0 S16
A32])) pr59163-2.C:15 84 {*movti_internal}
     (nil))
(insn 7 6 8 2 (set (mem/c:TI (plus:DI (reg/f:DI 20 frame)
                (const_int -16 [0xfffffffffffffff0])) [3 c+0 S16 A128])
        (reg:TI 90)) pr59163-2.C:15 84 {*movti_internal}
     (nil))
...
(insn 9 8 10 2 (set (reg:V4SF 91 [ vect__7.10 ])
        (mult:V4SF (reg:V4SF 92)
            (mem/c:V4SF (plus:DI (reg/f:DI 20 frame)
                    (const_int -16 [0xfffffffffffffff0])) [2 MEM[(float *)&c]+0
S16 A128]))) pr59163-2.C:17 1269 {*mulv4sf3}
     (nil))

movti_internal handles unaligned loads properly.
Then *.dse1 transforms this into:
(insn 6 3 18 2 (set (reg:TI 90 [ MEM[(const struct A &)a_4(D)] ])
        (mem:TI (reg/v/f:DI 89 [ a ]) [3 MEM[(const struct A &)a_4(D)]+0 S16
A32])) pr59163-2.C:15 84 {*movti_internal}
     (nil))
(insn 18 6 8 2 (set (reg:V4SF 94)
        (subreg:V4SF (reg:TI 90 [ MEM[(const struct A &)a_4(D)] ]) 0))
pr59163-2.C:15 -1
     (expr_list:REG_DEAD (reg:TI 90 [ MEM[(const struct A &)a_4(D)] ])
        (nil)))
...
(insn 9 8 19 2 (set (reg:V4SF 91 [ vect__7.10 ])
        (mult:V4SF (reg:V4SF 92)
            (reg:V4SF 94))) pr59163-2.C:17 1269 {*mulv4sf3}
     (expr_list:REG_DEAD (reg:V4SF 94)
        (expr_list:REG_DEAD (reg:V4SF 92)
            (nil))))
which also looks ok to me.  But then combine combines it into:
(insn 9 8 19 2 (set (reg:V4SF 91 [ vect__7.10 ])
        (mult:V4SF (reg:V4SF 92)
            (mem:V4SF (reg/v/f:DI 89 [ a ]) [3 MEM[(const struct A &)a_4(D)]+0
S16 A32]))) pr59163-2.C:17 1269 {*mulv4sf3}
     (expr_list:REG_DEAD (reg:V4SF 92)
        (nil)))
which is wrong (for pre-AVX), because mulv4sf3 can't accept unaligned memory.
Likely the SSEx pre-AVX predicates assume that an unaligned vector load will be
done using UNSPEC and thus not really mergeable here, and don't count with the
fact that the load could be done using integral mode and just subreged into
vector mode.  Perhaps we need new predicates for this that would fail for
exactly this situation (disallow unaligned scalar load subregged into vector
mode for pre-AVX) and use them everywhere where SSE? doesn't accept unaligned
loads?

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #6 from Uroš Bizjak <ubizjak at gmail dot com> ---
I think that we should disallow tie of TImode with 128bit vector modes due to
different alignment requirements. Integer register pairs can load unaligned
TImode without problems, while unaligned TImode will crash SSE insns.

Following patch fixes the problem:

Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c  (revision 205509)
+++ config/i386/i386.c  (working copy)
@@ -35237,6 +35237,7 @@ ix86_modes_tieable_p (enum machine_mode mode1, enu
     return (GET_MODE_SIZE (mode1) == 32
            && ix86_hard_regno_mode_ok (FIRST_SSE_REG, mode1));
   if (GET_MODE_SIZE (mode2) == 16
+      && !(mode1 == TImode || mode2 == TImode)
       && ix86_hard_regno_mode_ok (FIRST_SSE_REG, mode2))
     return (GET_MODE_SIZE (mode1) == 16
            && ix86_hard_regno_mode_ok (FIRST_SSE_REG, mode1));

However, it needs some refinements for AVX.
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Subject: [Bug c/59309] FAIL: c-c++-common/cilk-plus/CK/spawnee_inline.c  -g -fcilkplus (test for excess  errors)
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY309

--- Comment #4 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> ---
Author: hjl
Date: Fri Nov 29 13:00:35 2013
New Revision: 205525

URL: http://gcc.gnu.org/viewcvs?rev 5525&root=gcc&view=rev
Log:
Properly handle function without arguments

    PR c/59309
    * cilk.c (gimplify_cilk_spawn): Properly handle function without
    arguments.

Modified:
    trunk/gcc/c-family/ChangeLog
    trunk/gcc/c-family/cilk.c

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #7 from Uroš Bizjak <ubizjak at gmail dot com> ---
Maybe even better idea is to use ix86_legitimate_combined_insn and reject
combinations that would result in unaligned operands of all but vector move
instructions.
>From gcc-bugs-return-436252-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Fri Nov 29 13:46:49 2013
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From: "filipe.c.maia at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug c++/59342] New: Function Template Specialisation causing compiler error together with using clauses
Date: Fri, 29 Nov 2013 13:46:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY342

            Bug ID: 59342
           Summary: Function Template Specialisation causing compiler
                    error together with using clauses
           Product: gcc
           Version: 4.8.1
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c++
          Assignee: unassigned at gcc dot gnu.org
          Reporter: filipe.c.maia at gmail dot com

The following code causes a compilation error:

namespace bar
{
  void f(char x){;}
}

namespace foo
{
  // If the using clause is here; no error
  // using bar::f;
  template <typename T> void f(T x);
  template <> void f(int x);

  // With the using clause is here; error
  using bar::f;

  template <typename T> void f(T x){; }
  template <> void f(int x){ ; }
}

g++-4.8 -c namespace_noheader.cpp
namespace_noheader.cpp:17:27: error: 'void foo::f(int)' is not declared in
'foo'
   template <> void f(int x){ ; }
                           ^

I've also tried with newer versions online with the same result.
Moving the using line up makes the problem go away.

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #8 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Created attachment 31331
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=31331&action=edit
gcc49-pr59163.patch

So like this?  Untested...

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #9 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #8)
> Created attachment 31331 [details]
> gcc49-pr59163.patch
> 
> So like this?  Untested...

Yes, but I think that we can also allow simple vector loads and stores - they
emit movu insn when unaligned operand is detected.
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Subject: [Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY163

--- Comment #10 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
For stores I think the patch already allows that, that is the
  if (GET_CODE (*x) == SET && &SET_DEST (*x) == data)
    return 1;
in there (the reason why I've added it was that for the misaligned store insns
with UNSPEC_STOREU the misaligned MEM is in SET_DEST and SET_SRC just contains
some rtl with UNSPEC_STOREU embedded somewhere in it.
So, would you like:
  if (GET_CODE (*x) == SET && (&SET_DEST (*x) == data || &SET_SRC (*x) =data))
    return 1;
?  That would IMHO handle simple loads from misaligned MEM too.

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #11 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #10)
> For stores I think the patch already allows that, that is the
>   if (GET_CODE (*x) == SET && &SET_DEST (*x) == data)
>     return 1;
> in there (the reason why I've added it was that for the misaligned store
> insns
> with UNSPEC_STOREU the misaligned MEM is in SET_DEST and SET_SRC just
> contains some rtl with UNSPEC_STOREU embedded somewhere in it.
> So, would you like:
>   if (GET_CODE (*x) == SET && (&SET_DEST (*x) == data || &SET_SRC (*x) ==
> data))
>     return 1;
> ?  That would IMHO handle simple loads from misaligned MEM too.

Yes. Perhaps also special case sse4.2 string instructions (they can operate on
unaligned data, too), and the patch covers everything.
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY313

Eric Botcazou <ebotcazou at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2013-11-29
                 CC|                            |ebotcazou at gcc dot gnu.org
     Ever confirmed|0                           |1

--- Comment #1 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
I'm seeing this too.

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
  Attachment #31331|0                           |1
        is obsolete|                            |
             Status|NEW                         |ASSIGNED
           Assignee|unassigned at gcc dot gnu.org      |jakub at gcc dot gnu.org

--- Comment #12 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Created attachment 31332
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=31332&action=edit
gcc49-pr59163.patch

So like this?

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #13 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #12)
> Created attachment 31332 [details]
> gcc49-pr59163.patch
> 
> So like this?

Yes, with adjusted comment in ix86_legitimate_combined_insn.

IIRC, unaligned moves won't be propagated during or after reload, so it looks
to me that the approach is correct.
>From gcc-bugs-return-436285-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Fri Nov 29 18:17:09 2013
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Subject: [Bug middle-end/59011] [4.7/4.8/4.9 Regression] ICE in make_decl_rtl, at varasm.c:1147
Date: Fri, 29 Nov 2013 18:17:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY011

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

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[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #14 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Uroš Bizjak from comment #13)
> (In reply to Jakub Jelinek from comment #12)
> > Created attachment 31332 [details]
> > gcc49-pr59163.patch
> > 
> > So like this?
> 
> Yes, with adjusted comment in ix86_legitimate_combined_insn.
> 
> IIRC, unaligned moves won't be propagated during or after reload, so it
> looks to me that the approach is correct.

Running the testsuite with your patch applied exposed a minor problem:

FAIL: gcc.target/i386/sse-1.c scan-assembler-not movaps

movlps/movhps and movlpd/movhpd can also handle unaligned operands (please see
ix86_expand_vector_move_misalign). We should simply tag instructions that
operate on unaligned operands (attribute type = ssemovu) and check type
attribute instead.

The proposed approach would mean to change all scheduler and attribute
calculation checks from "ssemov" to "ssemov,ssemovu", but this would be a
simple mechanical change.
>From gcc-bugs-return-436290-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Fri Nov 29 20:06:13 2013
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From: "mpolacek at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug sanitizer/59333] ICE with long long and -m32 -fsanitize=undefined
Date: Fri, 29 Nov 2013 20:06:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY333

--- Comment #1 from Marek Polacek <mpolacek at gcc dot gnu.org> ---
I think we just shouldn't try to pass values by reference in
ubsan_encode_value...

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #15 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
(In reply to Uroš Bizjak from comment #14)
> (In reply to Uroš Bizjak from comment #13)
> > (In reply to Jakub Jelinek from comment #12)
> > > Created attachment 31332 [details]
> > > gcc49-pr59163.patch
> > > 
> > > So like this?
> > 
> > Yes, with adjusted comment in ix86_legitimate_combined_insn.
> > 
> > IIRC, unaligned moves won't be propagated during or after reload, so it
> > looks to me that the approach is correct.
> 
> Running the testsuite with your patch applied exposed a minor problem:
> 
> FAIL: gcc.target/i386/sse-1.c scan-assembler-not movaps
> 
> movlps/movhps and movlpd/movhpd can also handle unaligned operands (please
> see ix86_expand_vector_move_misalign). We should simply tag instructions
> that operate on unaligned operands (attribute type = ssemovu) and check type
> attribute instead.
> 
> The proposed approach would mean to change all scheduler and attribute
> calculation checks from "ssemov" to "ssemov,ssemovu", but this would be a
> simple mechanical change.

Yeah, I've noticed that too, plus the dumps I've used to note what instructions
have been rejected by the patch show that UNSPEC_LDDQU would need to be treated
like UNSPEC_LOADU.
The patch made difference for 32-bit:
gcc.target/i386/sse-1.c (as you write above)
gcc.dg/torture/pr18582-1.c (UNSPEC_LDDQU)
gcc.target/i386/sse4_1-movntdqa.c (UNSPEC_MOVNTDQA)
and 64-bit also
g++.dg/torture/pr59163.C (desirable)

Now, for movntdqa, I think it accepts only aligned memory, but the MEM in there
is supposed to be aligned and is created by
          if (i == memory)
            {
              /* This must be the memory operand.  */
              op = ix86_zero_extend_to_Pmode (op);
              op = gen_rtx_MEM (mode, op); 
              gcc_assert (GET_MODE (op) == mode
                          || GET_MODE (op) == VOIDmode);
            }
and there is similar code for builtins that store.
Supposedly for this we should use get_pointer_alignment (arg) and at least
set_mem_align (op, get_pointer_alignment (arg)); if it is larger than MEM_ALIGN
(op).  The gcc_assert doesn't make any sense to me, result of gen_rtx_MEM
(mode, op) will always have GET_MODE (op) == mode, no need to assert that and
it will never have VOIDmode.
Now, if we could easily find out which of the builtins assume aligned memory
(and to what extent), we should also set it, because say using
_mm_stream_load_si128 with not 128-bit aligned memory is user error, so GCC
should be able to assume A128 there.  I'd say the sse-1.c case is similar,
isn't it?
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Subject: [Bug c++/59347] New: ICE on invalid: tree check: expected class 'type', have 'exceptional' (error_mark) in tsubst_decl, at cp/pt.c:10798
Date: Fri, 29 Nov 2013 20:37:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idY347

            Bug ID: 59347
           Summary: ICE on invalid: tree check: expected class 'type',
                    have 'exceptional' (error_mark) in tsubst_decl, at
                    cp/pt.c:10798
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c++
          Assignee: unassigned at gcc dot gnu.org
          Reporter: dimhen at gmail dot com

$ uname -a
Linux dim.cp.ru 3.11.9-200.fc19.x86_64 #1 SMP Wed Nov 20 21:22:24 UTC 2013
x86_64 x86_64 x86_64 GNU/Linux

$ gcc -v
Using built-in specs.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/local/gcc_current/libexec/gcc/x86_64-unknown-linux-gnu/4.9.0/lto-wrapper
Target: x86_64-unknown-linux-gnu
Configured with: /home/dimhen/src/gcc_current/configure
--prefix=/usr/local/gcc_current --with-multilib-list=m64
--enable-checking=yes,df,fold,rtl,tree --enable-languages=c,c++,lto
--enable-plugin --with-tune=native --with-arch=native
--enable-version-specific-runtime-libs
Thread model: posix
gcc version 4.9.0 20131129 (experimental) [trunk revision 205527] (GCC)

$ cat x.ii
struct cast_retty_wrap;
template <class> struct cast_retty {
  typedef cast_retty_wrap<>::ret_type
} class Y cast_retty<Y>::

$ g++ -fpreprocessed -fsyntax-only x.ii
x.ii:3:11: error: 'cast_retty_wrap' is not a template
   typedef cast_retty_wrap<>::ret_type
           ^
x.ii:3:30: error: typedef name may not be a nested-name-specifier
   typedef cast_retty_wrap<>::ret_type
                              ^
x.ii:3:30: error: expected ';' at end of member declaration
x.ii:4:1: error: expected ';' after struct definition
 } class Y cast_retty<Y>::
 ^
x.ii: In instantiation of 'struct cast_retty<Y>':
x.ii:4:24:   required from here
x.ii:3:30: internal compiler error: tree check: expected class 'type', have
'exceptional' (error_mark) in tsubst_decl, at cp/pt.c:10798
   typedef cast_retty_wrap<>::ret_type
                              ^
0xeea097 tree_class_check_failed(tree_node const*, tree_code_class, char
const*, int, char const*)
    /home/dimhen/src/gcc_current/gcc/tree.c:9241
0x6c14d8 tree_class_check
    /home/dimhen/src/gcc_current/gcc/tree.h:2825
0x6c14d8 tsubst_decl
    /home/dimhen/src/gcc_current/gcc/cp/pt.c:10798
0x6abd2c tsubst(tree_node*, tree_node*, int, tree_node*)
    /home/dimhen/src/gcc_current/gcc/cp/pt.c:11338
0x6da18f instantiate_class_template_1
    /home/dimhen/src/gcc_current/gcc/cp/pt.c:8987
0x6da18f instantiate_class_template(tree_node*)
    /home/dimhen/src/gcc_current/gcc/cp/pt.c:9251
0x76a933 complete_type(tree_node*)
    /home/dimhen/src/gcc_current/gcc/cp/typeck.c:134
0x743298 cp_parser_nested_name_specifier_opt
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:5389
0x743d7b cp_parser_nested_name_specifier
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:5452
0x743eb7 cp_parser_ptr_operator
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:17485
0x74b800 cp_parser_declarator
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:16834
0x756939 cp_parser_init_declarator
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:16433
0x758699 cp_parser_simple_declaration
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:11134
0x73c5a3 cp_parser_block_declaration
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:11015
0x762c26 cp_parser_declaration
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:10912
0x761918 cp_parser_declaration_seq_opt
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:10798
0x7631eb cp_parser_translation_unit
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:4018
0x7631eb c_parse_file()
    /home/dimhen/src/gcc_current/gcc/cp/parser.c:31261
0x880973 c_common_parse_file()
    /home/dimhen/src/gcc_current/gcc/c-family/c-opts.c:1056
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <http://gcc.gnu.org/bugs.html> for instructions.

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #16 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Note that (according to my reading of the docs) e.g. movlps/movhps don't allow
unaligned memory, so blindly allow any combine is wrong, but while the MEM
operand in those cases is say V4SFmode, the loads or stores can have V2SFmode's
alignment.  So, I don't see how ssemovu type would help us here, I think we
handle all the completely unaligned loads/stores already (after the
UNSPEC_LDDQU addition).  But we need some way how to determine for which
instructions we should require only smaller alignment, plus tweak the two
gen_rtx_MEM spots for the builtins and set mode there according to
get_pointer_alignment and/or to assumed alignment of the builtins.

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #17 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Perhaps add new attribute ssememalign, with default 0, which would be (maximum
for all alternatives) required alignment for memory operands in the instruction
pre-AVX, or 0 for GET_MODE_ALIGNMENT.  So, instructions that can handle
completely unaligned loads/stores in all alternatives would have ssememalign 8,
instructions that require everything properly aligned would have default
ssememalign 0, and say movlps/movhps would have ssememalign 64.  The default
would be conservatively correct, so whether instructions would have ssememalign
attribute would be just an optimization issue (but, if it would be non-zero, it
would have to be correct).

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #18 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #17)
> Perhaps add new attribute ssememalign, with default 0, which would be
> (maximum for all alternatives) required alignment for memory operands in the
> instruction pre-AVX, or 0 for GET_MODE_ALIGNMENT.  So, instructions that can
> handle completely unaligned loads/stores in all alternatives would have
> ssememalign 8,
> instructions that require everything properly aligned would have default
> ssememalign 0, and say movlps/movhps would have ssememalign 64.  The default
> would be conservatively correct, so whether instructions would have
> ssememalign attribute would be just an optimization issue (but, if it would
> be non-zero, it would have to be correct).

This sounds like a good approach to me.
>From gcc-bugs-return-436328-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Sat Nov 30 10:58:53 2013
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Subject: [Bug fortran/57445] [4.8/4.9 Regression][OOP] ICE in gfc_conv_class_to_class - for OPTIONAL polymorphic array
Date: Sat, 30 Nov 2013 10:58:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?idW445

--- Comment #4 from Paul Thomas <pault at gcc dot gnu.org> ---
Author: pault
Date: Sat Nov 30 10:58:42 2013
New Revision: 205549

URL: http://gcc.gnu.org/viewcvs?rev 5549&root=gcc&view=rev
Log:
2013-11-30  Paul Thomas  <pault@gcc.gnu.org>

    PR fortran/57445
    * trans-expr.c (gfc_conv_class_to_class): Remove spurious
    assert.

2013-11-30  Paul Thomas  <pault@gcc.gnu.org>

    PR fortran/57445
    * gfortran.dg/optional_class_1.f90 : New test

Added:
    branches/gcc-4_8-branch/gcc/testsuite/gfortran.dg/optional_class_1.f90
Modified:
    branches/gcc-4_8-branch/gcc/fortran/ChangeLog
    branches/gcc-4_8-branch/gcc/fortran/trans-expr.c
    branches/gcc-4_8-branch/gcc/testsuite/ChangeLog

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #19 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Wed Dec  4 11:11:24 2013
New Revision: 205661

URL: http://gcc.gnu.org/viewcvs?rev=205661&root=gcc&view=rev
Log:
    PR target/59163
    * config/i386/i386.c (ix86_legitimate_combined_insn): If for
    !TARGET_AVX there is misaligned MEM operand with vector mode
    and get_attr_ssememalign is 0, return false.
    (ix86_expand_special_args_builtin): Add get_pointer_alignment
    computed alignment and for non-temporal loads/stores also
    at least GET_MODE_ALIGNMENT as MEM_ALIGN.
    * config/i386/sse.md
    (<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>,
    <sse>_storeu<ssemodesuffix><avxsizesuffix>,
    <sse2_avx_avx512f>_loaddqu<mode><mask_name>,
    <sse2_avx_avx512f>_storedqu<mode>, <sse3>_lddqu<avxsizesuffix>,
    sse_vmrcpv4sf2, sse_vmrsqrtv4sf2, sse2_cvtdq2pd, sse_movhlps,
    sse_movlhps, sse_storehps, sse_loadhps, sse_loadlps,
    *vec_interleave_highv2df, *vec_interleave_lowv2df,
    *vec_extractv2df_1_sse, sse2_movsd, sse4_1_<code>v8qiv8hi2,
    sse4_1_<code>v4qiv4si2, sse4_1_<code>v4hiv4si2,
    sse4_1_<code>v2qiv2di2, sse4_1_<code>v2hiv2di2,
    sse4_1_<code>v2siv2di2, sse4_2_pcmpestr, *sse4_2_pcmpestr_unaligned,
    sse4_2_pcmpestri, sse4_2_pcmpestrm, sse4_2_pcmpestr_cconly,
    sse4_2_pcmpistr, *sse4_2_pcmpistr_unaligned, sse4_2_pcmpistri,
    sse4_2_pcmpistrm, sse4_2_pcmpistr_cconly): Add ssememalign attribute.
    * config/i386/i386.md (ssememalign): New define_attr.

    * g++.dg/torture/pr59163.C: New test.

Added:
    trunk/gcc/testsuite/g++.dg/torture/pr59163.C
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/i386/i386.c
    trunk/gcc/config/i386/i386.md
    trunk/gcc/config/i386/sse.md
    trunk/gcc/testsuite/ChangeLog

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #20 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Wed Dec  4 11:12:04 2013
New Revision: 205663

URL: http://gcc.gnu.org/viewcvs?rev=205663&root=gcc&view=rev
Log:
    PR target/59163
    * config/i386/i386.c (ix86_legitimate_combined_insn): If for
    !TARGET_AVX there is misaligned MEM operand with vector mode
    and get_attr_ssememalign is 0, return false.
    (ix86_expand_special_args_builtin): Add get_pointer_alignment
    computed alignment and for non-temporal loads/stores also
    at least GET_MODE_ALIGNMENT as MEM_ALIGN.
    * config/i386/sse.md
    (<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>,
    <sse>_storeu<ssemodesuffix><avxsizesuffix>,
    <sse2_avx_avx512f>_loaddqu<mode><mask_name>,
    <sse2_avx_avx512f>_storedqu<mode>, <sse3>_lddqu<avxsizesuffix>,
    sse_vmrcpv4sf2, sse_vmrsqrtv4sf2, sse2_cvtdq2pd, sse_movhlps,
    sse_movlhps, sse_storehps, sse_loadhps, sse_loadlps,
    *vec_interleave_highv2df, *vec_interleave_lowv2df,
    *vec_extractv2df_1_sse, sse2_movsd, sse4_1_<code>v8qiv8hi2,
    sse4_1_<code>v4qiv4si2, sse4_1_<code>v4hiv4si2,
    sse4_1_<code>v2qiv2di2, sse4_1_<code>v2hiv2di2,
    sse4_1_<code>v2siv2di2, sse4_2_pcmpestr, *sse4_2_pcmpestr_unaligned,
    sse4_2_pcmpestri, sse4_2_pcmpestrm, sse4_2_pcmpestr_cconly,
    sse4_2_pcmpistr, *sse4_2_pcmpistr_unaligned, sse4_2_pcmpistri,
    sse4_2_pcmpistrm, sse4_2_pcmpistr_cconly): Add ssememalign attribute.
    * config/i386/i386.md (ssememalign): New define_attr.

    * g++.dg/torture/pr59163.C: New test.

Modified:
    trunk/gcc/config/i386/i386.c

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #21 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Wed Dec  4 15:50:02 2013
New Revision: 205671

URL: http://gcc.gnu.org/viewcvs?rev=205671&root=gcc&view=rev
Log:
    PR target/59163
    * config/i386/i386.c (ix86_legitimate_combined_insn): If for
    !TARGET_AVX there is misaligned MEM operand with vector mode
    and get_attr_ssememalign is 0, return false.
    (ix86_expand_special_args_builtin): Add get_pointer_alignment
    computed alignment and for non-temporal loads/stores also
    at least GET_MODE_ALIGNMENT as MEM_ALIGN.
    * config/i386/sse.md
    (<sse>_loadu<ssemodesuffix><avxsizesuffix>,
    <sse>_storeu<ssemodesuffix><avxsizesuffix>,
    <sse2>_loaddqu<avxsizesuffix>,
    <sse2>_storedqu<avxsizesuffix>, <sse3>_lddqu<avxsizesuffix>,
    sse_vmrcpv4sf2, sse_vmrsqrtv4sf2, sse2_cvtdq2pd, sse_movhlps,
    sse_movlhps, sse_storehps, sse_loadhps, sse_loadlps,
    *vec_interleave_highv2df, *vec_interleave_lowv2df,
    *vec_extractv2df_1_sse, sse2_loadhpd, sse2_loadlpd, sse2_movsd,
    sse4_1_<code>v8qiv8hi2, sse4_1_<code>v4qiv4si2,
    sse4_1_<code>v4hiv4si2, sse4_1_<code>v2qiv2di2,
    sse4_1_<code>v2hiv2di2, sse4_1_<code>v2siv2di2, sse4_2_pcmpestr,
    *sse4_2_pcmpestr_unaligned, sse4_2_pcmpestri, sse4_2_pcmpestrm,
    sse4_2_pcmpestr_cconly, sse4_2_pcmpistr, *sse4_2_pcmpistr_unaligned,
    sse4_2_pcmpistri, sse4_2_pcmpistrm, sse4_2_pcmpistr_cconly): Add
    ssememalign attribute.
    * config/i386/i386.md (ssememalign): New define_attr.

    * g++.dg/torture/pr59163.C: New test.

Added:
    branches/gcc-4_8-branch/gcc/testsuite/g++.dg/torture/pr59163.C
Modified:
    branches/gcc-4_8-branch/gcc/ChangeLog
    branches/gcc-4_8-branch/gcc/config/i386/i386.c
    branches/gcc-4_8-branch/gcc/config/i386/i386.md
    branches/gcc-4_8-branch/gcc/config/i386/sse.md
    branches/gcc-4_8-branch/gcc/testsuite/ChangeLog

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #22 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Fixed.

[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #23 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
.