[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

["ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #9 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #8)
> Created attachment 31331 [details]
> gcc49-pr59163.patch
> 
> So like this?  Untested...

Yes, but I think that we can also allow simple vector loads and stores - they
emit movu insn when unaligned operand is detected.
>From gcc-bugs-return-436278-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org Fri Nov 29 16:35:15 2013
Return-Path: <gcc-bugs-return-436278-listarch-gcc-bugs=gcc.gnu.org@gcc.gnu.org>
Delivered-To: listarch-gcc-bugs@gcc.gnu.org
Received: (qmail 21990 invoked by alias); 29 Nov 2013 16:35:15 -0000
Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm
Precedence: bulk
List-Id: <gcc-bugs.gcc.gnu.org>
List-Archive: <http://gcc.gnu.org/ml/gcc-bugs/>
List-Post: <mailto:gcc-bugs@gcc.gnu.org>
List-Help: <mailto:gcc-bugs-help@gcc.gnu.org>
Sender: gcc-bugs-owner@gcc.gnu.org
Delivered-To: mailing list gcc-bugs@gcc.gnu.org
Received: (qmail 21813 invoked by uid 48); 29 Nov 2013 16:35:11 -0000
From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults
Date: Fri, 29 Nov 2013 16:35:00 -0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: target
X-Bugzilla-Version: 4.8.2
X-Bugzilla-Keywords: wrong-code
X-Bugzilla-Severity: normal
X-Bugzilla-Who: jakub at gcc dot gnu.org
X-Bugzilla-Status: NEW
X-Bugzilla-Priority: P2
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: 4.8.3
X-Bugzilla-Flags:
X-Bugzilla-Changed-Fields:
Message-ID: <bug-59163-4-J4lYNbL3zL@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-59163-4@http.gcc.gnu.org/bugzilla/>
References: <bug-59163-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: 7bit
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
X-SW-Source: 2013-11/txt/msg03055.txt.bz2
Content-length: 639

http://gcc.gnu.org/bugzilla/show_bug.cgi?idY163

--- Comment #10 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
For stores I think the patch already allows that, that is the
  if (GET_CODE (*x) == SET && &SET_DEST (*x) == data)
    return 1;
in there (the reason why I've added it was that for the misaligned store insns
with UNSPEC_STOREU the misaligned MEM is in SET_DEST and SET_SRC just contains
some rtl with UNSPEC_STOREU embedded somewhere in it.
So, would you like:
  if (GET_CODE (*x) == SET && (&SET_DEST (*x) == data || &SET_SRC (*x) =data))
    return 1;
?  That would IMHO handle simple loads from misaligned MEM too.