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From: "olegendo at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/59401] [SH] GBR addressing mode optimization produces wrong code
Date: Thu, 05 Dec 2013 20:43:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59401

--- Comment #1 from Oleg Endo <olegendo at gcc dot gnu.org> ---
An example where the base address is retrieved from the GBR in one basic block,
but used in different basic blocks:

struct tcb_t
{
  int x, y, z, w;
};

int test_01 (int a, tcb_t* b, int c)
{
  tcb_t* tcb = (tcb_t*)__builtin_thread_pointer ();

  return (a & 5) ? tcb->x : tcb->w;
}

By coincidence it produces correct code:

        mov     r4,r0
        tst     #5,r0
        bf      .L7
        mov.l   @(12,gbr),r0
        rts
        nop
.L7:
        rts
        mov.l   @(0,gbr),r0

A proper fix for this would be to collect all "leaf values" for the address
registers in question from all predecessor basic blocks as it's done in the
function sh_optimize_sett_clrt::find_last_ccreg_values in
sh_optimize_sett_clrt.cc.